Datasheet KSZ8794CNX (Microchip) - 6
| Fabricante | Microchip |
| Descripción | Integrated 4-Port 10/100 Managed Ethernet Switch with Gigabit RGMII/MII/RMII Interface |
| Páginas / Página | 124 / 6 — KSZ8794CNX. 2.0. PIN DESCRIPTION AND CONFIGURATION. FIGURE 2-1:. 64-QFN … |
| Formato / tamaño de archivo | PDF / 1.7 Mb |
| Idioma del documento | Inglés |
KSZ8794CNX. 2.0. PIN DESCRIPTION AND CONFIGURATION. FIGURE 2-1:. 64-QFN PIN ASSIGNMENT (TOP VIEW). KSZ8794
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KSZ8794CNX 2.0 PIN DESCRIPTION AND CONFIGURATION FIGURE 2-1: 64-QFN PIN ASSIGNMENT (TOP VIEW)
T33 XO XI GNDA ISET VDDA VDD12D RST_N GNDD VDDIO SPIS_N SDA_MDIO SCL_MDC SPIQ LED1_0 LED1_1 LED2_0 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 VDD12A 1 48 LED2_1 VDDAT33 2 47 PME GNDA 3 46 REFCLKO RXP1 4 45 COL4 RXM1 5 44 CRS4 TXP1 6 43 RXER4 TXM1 7 42 RXDV4/CRSDV4/RXD4_CTL RXP2 8
KSZ8794
41 RXD4_3 (Top View) RXM2 9 40 RXD4_2 64-pin QFN TXP2 10 39 VDDIO TXM2 11 38 GNDD VDDAT33 12 37 RXD4_1 RXP3 13 36 RXD4_0 RXM3 14 35 RXC4/GRXC4 TXP3 15 34 TXC4/REFCLKI4/GTXC4 TXM3 16 33 VDD12D 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NC GNDA GNDD GNDD TXEN4 VDDIO GNDD INTR_N LED3_1 LED3_0 TXER4 TXD4_0 TXD4_1 TXD4_2 TXD4_3 VDD12D DS00002134A-page 6 2016 Microchip Technology Inc. Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer (PHY) 3.2 Media Access Controller (MAC) Operation 3.3 Switch Core 3.4 Power and Power Management 3.5 Interfaces 3.6 Advanced Functionality 4.0 Device Registers 4.1 Register Map 4.2 Port Registers 4.3 Advanced Control Registers 4.4 Static MAC Address Table 4.5 VLAN Table 4.6 Dynamic MAC Address Table 4.7 PME Indirect Registers 4.8 ACL Rule Table and ACL Indirect Registers 4.9 EEE Indirect Registers 4.10 Management Information Base (MIB) Counters 4.11 MIIM Registers 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Diagrams 8.0 Reset Circuit 9.0 Selection of Isolation Transformer 10.0 Selection of Reference Crystal 11.0 Package Outlines
T33 XO XI GNDA ISET VDDA VDD12D RST_N GNDD VDDIO SPIS_N SDA_MDIO SCL_MDC SPIQ LED1_0 LED1_1 LED2_0 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 VDD12A 1 48 LED2_1 VDDAT33 2 47 PME GNDA 3 46 REFCLKO RXP1 4 45 COL4 RXM1 5 44 CRS4 TXP1 6 43 RXER4 TXM1 7 42 RXDV4/CRSDV4/RXD4_CTL RXP2 8
KSZ8794
41 RXD4_3 (Top View) RXM2 9 40 RXD4_2 64-pin QFN TXP2 10 39 VDDIO TXM2 11 38 GNDD VDDAT33 12 37 RXD4_1 RXP3 13 36 RXD4_0 RXM3 14 35 RXC4/GRXC4 TXP3 15 34 TXC4/REFCLKI4/GTXC4 TXM3 16 33 VDD12D 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NC GNDA GNDD GNDD TXEN4 VDDIO GNDD INTR_N LED3_1 LED3_0 TXER4 TXD4_0 TXD4_1 TXD4_2 TXD4_3 VDD12D DS00002134A-page 6 2016 Microchip Technology Inc. Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer (PHY) 3.2 Media Access Controller (MAC) Operation 3.3 Switch Core 3.4 Power and Power Management 3.5 Interfaces 3.6 Advanced Functionality 4.0 Device Registers 4.1 Register Map 4.2 Port Registers 4.3 Advanced Control Registers 4.4 Static MAC Address Table 4.5 VLAN Table 4.6 Dynamic MAC Address Table 4.7 PME Indirect Registers 4.8 ACL Rule Table and ACL Indirect Registers 4.9 EEE Indirect Registers 4.10 Management Information Base (MIB) Counters 4.11 MIIM Registers 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Diagrams 8.0 Reset Circuit 9.0 Selection of Isolation Transformer 10.0 Selection of Reference Crystal 11.0 Package Outlines