Datasheet ADXRS450 (Analog Devices) - 2

FabricanteAnalog Devices
Descripción±300°/sec High Vibration Immunity Digital Gyro
Páginas / Página29 / 2 — ADXRS450* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. …
RevisiónC
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ADXRS450* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. COMPARABLE PARTS. REFERENCE MATERIALS. Technical Articles

ADXRS450* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS REFERENCE MATERIALS Technical Articles

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ADXRS450* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS REFERENCE MATERIALS
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Technical Articles
• MS-2158: Gyro Mechanical Performance: The Most
EVALUATION KITS
Important Parameter • ADXRS450Z Evaluation Board • Real Time Eval System for Digital Output Sensor
DESIGN RESOURCES
• ADXRS450 Material Declaration
DOCUMENTATION
• PCN-PDN Information
Application Notes
• Quality And Reliability • AN-1073: Soldering Recommendations for the Ceramic • Symbols and Footprints Vertical Mount Package
Data Sheet DISCUSSIONS
• ADXRS450: High Performance, Digital Output Gyroscope View all ADXRS450 EngineerZone Discussions. Data Sheet
User Guides SAMPLE AND BUY
• UG-245: Evaluation Board for the ±300°/sec, Single-Axis Visit the product page to see pricing options. Digital Output Rate Gyroscope • UG-260: ADXRS450/ADXRS453 Sensor Evaluation System
TECHNICAL SUPPORT
Submit a technical question or find your regional support
SOFTWARE AND SYSTEMS REQUIREMENTS
number. • ADXRS450 IIO Gyroscope Linux Driver
DOCUMENT FEEDBACK
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Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance Rate Sensitive Axis ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Continuous Self-Test Applications Information Mechanical Considerations for Mounting Applications Circuits ADXRS450 Signal Chain Timing SPI Communication Protocol Command/Response SPI Communications Characteristics SPI Applications Device Data Latching Command/Response—Bit Definitions SQ2 to SQ0 SM2 to SM0 A8 to A0 D15 to D0 SPI ST1 to ST0 P P0 P1 RE DU Fault Register Bit Definitions PLL Q NVM POR PWR CST CHK OV UV Fail Amp K-Bit Assertion: Recommended Start-Up Routine SPI Rate Data Format Memory Map and Registers Memory Map Memory Register Definitions Rate Registers Temperature (TEMx) Registers Low CST (LOCST) Memory Registers High CST (HICST) Memory Registers Quad Memory Registers Fault Registers Part ID (PID) Registers Serial Number (SN) Registers Dynamic Null Correction (DNC) Registers Package Orientation and Layout Information Package Marking Codes Outline Dimensions Ordering Guide