Datasheet ADXL362 (Analog Devices) - 6

link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7
ADXL362 Data Sheet SPECIFICATIONS
TA = 25°C, VS = 2.0 V, VDD I/O = 2.0 V, 100 Hz ODR, HALF_BW = 0, ±2 g range, acceleration = 0 g, default settings for other registers, unless otherwise noted.1
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
SENSOR INPUT Each axis Measurement Range User selectable ±2, ±4, ±8 g Nonlinearity Percentage of full scale ±0.5 % Sensor Resonant Frequency 3000 Hz Cross Axis Sensitivity2 ±1.5 % OUTPUT RESOLUTION Each axis All g Ranges 12 Bits SENSITIVITY Each axis Sensitivity Calibration Error ±10 % Sensitivity at XOUT, YOUT, ZOUT 2 g range 1 mg/LSB 4 g range 2 mg/LSB 8 g range 4 mg/LSB Scale Factor at XOUT, YOUT, ZOUT 2 g range 1000 LSB/g 4 g range 500 LSB/g 8 g range 250 LSB/g Sensitivity Change Due to Temperature3 −40°C to +85°C 0.05 %/°C 0 g OFFSET Each axis 0 g Output4 XOUT, YOUT −150 ±35 +150 mg ZOUT −250 ±50 +250 mg 0 g Offset vs. Temperature3 Normal Operation XOUT, YOUT ±0.5 mg/°C ZOUT ±0.6 mg/°C Low Noise Mode and Ultralow Noise XOUT, YOUT, ZOUT ±0.35 mg/°C Mode NOISE PERFORMANCE Noise Density Normal Operation XOUT, YOUT 550 µg/√Hz ZOUT 920 µg/√Hz Low Noise Mode XOUT, YOUT 400 µg/√Hz ZOUT 550 µg/√Hz Ultralow Noise Mode XOUT, YOUT 250 µg/√Hz ZOUT 350 µg/√Hz VS = 3.5 V; XOUT, YOUT 175 µg/√Hz VS = 3.5 V; ZOUT 250 µg/√Hz BANDWIDTH Low Pass (Antialiasing) Filter, −3 dB HALF_BW = 0 ODR/2 Hz Corner HALF_BW = 1 ODR/4 Hz Output Data Rate (ODR) User selectable in 8 steps 12.5 400 Hz SELF TEST Output Change5 XOUT 230 550 870 mg YOUT −870 −550 −230 mg ZOUT 270 535 800 mg POWER SUPPLY Operating Voltage Range (VS) 1.6 2.0 3.5 V I/O Voltage Range (VDD I/O) 1.6 2.0 VS V Rev. E | Page 4 of 43 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE PACKAGE INFORMATION RECOMMENDED SOLDERING PROFILE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION MECHANICAL DEVICE OPERATION OPERATING MODES Measurement Mode Wake-Up Mode Standby SELECTABLE MEASUREMENT RANGES SELECTABLE OUTPUT DATA RATES Antialiasing POWER/NOISE TRADEOFF POWER SAVINGS FEATURES ULTRALOW POWER CONSUMPTION IN ALL MODES MOTION DETECTION Activity Detection Referenced and Absolute Configurations Fewer False Positives Inactivity Detection Linking Activity and Inactivity Detection Default Mode Linked Mode Loop Mode Autosleep Using the AWAKE Bit FIFO System Level Power Savings Data Recording/Event Context COMMUNICATIONS SPI Instructions Bus Keepers MSB Registers ADDITIONAL FEATURES FREE FALL DETECTION EXTERNAL CLOCK SYNCHRONIZED DATA SAMPLING SELF TEST USER REGISTER PROTECTION TEMPERATURE SENSOR SERIAL COMMUNICATIONS SPI COMMANDS Read and Write Register Commands Read FIFO Command MULTIBYTE TRANSFERS Register Read/Write Auto-Increment INVALID ADDRESSES AND ADDRESS FOLDING LATENCY RESTRICTIONS INVALID COMMANDS REGISTER MAP REGISTER DETAILS DEVICE ID REGISTER DEVICE ID: 0x1D REGISTER PART ID: 0xF2 REGISTER SILICON REVISION ID REGISTER X-AXIS DATA (8 MSB) REGISTER Y-AXIS DATA (8 MSB) REGISTER Z-AXIS DATA (8 MSB) REGISTER STATUS REGISTER FIFO ENTRIES REGISTERS X-AXIS DATA REGISTERS Y-AXIS DATA REGISTERS Z-AXIS DATA REGISTERS TEMPERATURE DATA REGISTERS SOFT RESET REGISTER ACTIVITY THRESHOLD REGISTERS ACTIVITY TIME REGISTER INACTIVITY THRESHOLD REGISTERS INACTIVITY TIME REGISTERS ACTIVITY/INACTIVITY CONTROL REGISTER FIFO CONTROL REGISTER FIFO SAMPLES REGISTER INT1/INT2 FUNCTION MAP REGISTERS FILTER CONTROL REGISTER POWER CONTROL REGISTER SELF TEST REGISTER APPLICATIONS INFORMATION APPLICATION EXAMPLES Device Configuration Autonomous Motion Switch Start-up Routine Using External Timing Triggers Example: Implementing Free Fall Detection Start-up Routine POWER Power Supply Decoupling Power Supply Requirements FIFO MODES FIFO Disabled Oldest Saved Mode Stream Mode Triggered Mode FIFO Configuration FIFO Interrupts Retrieving Data from FIFO INTERRUPTS Interrupt Pins Alternate Functions of Interrupt Pins Activity and Inactivity Interrupts Data Ready Interrupt Using FIFO Interrupts FIFO Watermark FIFO Ready Overrun USING SYNCHRONIZED DATA SAMPLING USING AN EXTERNAL CLOCK USING SELF TEST OPERATION AT VOLTAGES OTHER THAN 2.0 V MECHANICAL CONSIDERATIONS FOR MOUNTING AXES OF ACCELERATION SENSITIVITY LAYOUT AND DESIGN RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE