Datasheet LTC4315 (Analog Devices) - 9

LTC4315
APPLICATIONS INFORMATION
The LTC4315 provides capacitance buffering, data and Figures 1 and 2 show the rising waveforms of heavily clock Hot Swap capability and level translation of I2C signals loaded SDAIN and SDAOUT busses with the ACC pin set for on its clock and data pins. The high noise margin of the strong mode and 2.5mA current source mode respectively. LTC4315 permits interoperability with I2C devices that drive In both figures, during a rising edge, the buffers are active a high VOL, permits series connection of multiple LTC4315s and the input and output sides connected, until the bus and provides improved I2C communication reliability. voltages on both the input and output sides are greater than The LTC4315 isolates backplane and card capacitances, 0.33 • VMIN, where VMIN is the lower of the VCC and VCC2 provides slew limited acceleration of rising edges and slew voltages. When each individual bus voltage rises above control of falling edges while level translating 1.5V, 1.8V, 0.41 • VMIN, the RTA on that bus turns on. The effect of the 2.5V, 3.3V and 5V busses. These features are illustrated acceleration strength is shown in the SDA waveforms in in the following subsections. Figures 1 and 2 for identical bus loads. The RTAs supply 10mA and 2.5mA of pull-up current IRTA in the strong and
RISE TIME ACCELERATOR (RTA) PULL-UP CURRENT
current source modes respectively for the bus conditions
STRENGTH
shown in Figures 1 and 2. For identical bus loads, the bus After an input to output connection has been established rises faster in Figure 1 compared to Figure 2 because of the RTAs on both the input and output sides of the SDA the higher IRTA. and SCL busses are activated based on the state of the ACC pin and the VCC2 supply voltage. During positive bus transitions of at least 0.4V/μs, the RTAs provide pull-up currents to reduce rise time. Enabling the RTAs allows SDAOUT users to choose larger bus pull-up resistors to reduce power consumption and improve logic low noise margins, to design with bus capacitances outside of the I2C speci- SDAIN V 2V/DIV CC = VCC2 = 5V RBUS = 20k fication and to operate at a higher clock frequency. The CIN = COUT = 200pF ACC = 0V function of the ACC pin in setting IRTA is summarized in 1μs/DIV 4315 F01 Table 1. In the strong mode (ACC low) the acceleration is slew limited to a maximum bus rise rate of 75V/μs. The
Figure 1. Bus Rising Edge for the Strong Acceleration Mode. VCC = VCC2 = 5V
strong mode current is therefore directly proportional to the bus capacitance. The LTC4315 is capable of sourcing up to 40mA of current in the strong mode. If ACC is left open, rise time acceleration is provided by a 2.5mA pull up. SDAOUT
TABLE 1: ACC Control of the RTA Current IRTA ACC IRTA
Low Strong SDAIN V 2V/DIV CC = VCC2 = 5V RBUS = 20k Hi-Z 2.5mA CIN = COUT = 200pF ACC = OPEN High None 1μs/DIV 4315 F02 The ACC pin has a resistive divider between V
Figure 2. Bus Rising Edge for the Current Source
CC and ground
Acceleration Mode. V
to set its voltage to 0.5 • V
CC = VCC2 = 5V
CC if left open. 4315f 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS