Datasheet LTC4313-1, LTC4313-2, LTC4313-3 (Analog Devices)
| Fabricante | Analog Devices |
| Descripción | 2-Wire Bus Buffers with High Noise Margin |
| Páginas / Página | 20 / 1 — FeaTures. DescripTion. Bidirectional Buffer Increases Fanout. High Noise … |
| Formato / tamaño de archivo | PDF / 296 Kb |
| Idioma del documento | Inglés |
FeaTures. DescripTion. Bidirectional Buffer Increases Fanout. High Noise Margin with VIL = 0.3•VCC
Línea de modelo para esta hoja de datos
- LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LTC4313CDD-2#PBF LTC4313CDD-2#TRPBF LTC4313CDD-3#PBF LTC4313CDD-3#TRPBF LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTC4313CMS8-2#PBF LTC4313CMS8-2#TRPBF LTC4313CMS8-3#PBF LTC4313CMS8-3#TRPBF LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LTC4313IDD-2#PBF LTC4313IDD-2#TRPBF LTC4313IDD-3#PBF LTC4313IDD-3#TRPBF LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF LTC4313IMS8-2#PBF LTC4313IMS8-2#TRPBF LTC4313IMS8-3#PBF LTC4313IMS8-3#TRPBF
- LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF
Versión de texto del documento
LTC4313-1/LTC4313-2/ LTC4313-3 2-Wire Bus Buffers with High Noise Margin
FeaTures DescripTion
n
Bidirectional Buffer Increases Fanout
The LTC®4313 is a hot swappable 2-wire bus buffer n
High Noise Margin with VIL = 0.3•VCC
that provides bidirectional buffering while maintain- n
Compatible with Non-Compliant I2C Devices That
ing a low offset voltage and high noise margin up to
Drive a High V
0.3 • V
OL
CC. The high noise margin allows the LTC4313 to be n
Strong (LTC4313-1) and 2.5mA (LTC4313-2)
interoperable with devices that drive a high VOL (>0.4V) and
Rise Time Accelerator Current
allows multiple LTC4313s to be cascaded. The LTC4313-1 n
Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
and LTC4313-2 support level translation between 3.3V and n Prevents SDA and SCL Corruption During Live Board 5V busses. In addition to these voltages, the LTC4313-3 Insertion and Removal from Backplane also supports level translation to 1.5V, 1.8V and 2.5V. n Stuck Bus Disconnect and Recovery During insertion, the SDA and SCL lines are pre-charged to n Compatible with I2C, I2C Fast Mode and SMBus 1V to minimize bus disturbances. Connection is established n ±4kV Human Body Model ESD Ruggedness between the input and output after ENABLE is asserted n High Impedance SDA, SCL Pins When Unpowered high and a stop bit or bus idle condition has been detected n 8-Lead MSOP and 8-Lead (3mm × 3mm) DFN on the SDA and SCL pins. Packages If both data and clock are not simultaneously high at least once in 45ms, the input is disconnected from the output.
applicaTions
Up to 16 clock pulses are subsequently generated to free the stuck bus. Rise time accelerators (RTAs) provide pull-up n Capacitance Buffers/Bus Extender currents on SDA and SCL rising edges to meet rise time n Live Board Insertion specifications in heavily loaded systems. The RTAs are n Telecommunications Systems Including ATCA configured as slew limited switches in the LTC4313-1 and n Level Translation 2.5mA current sources in the LTC4313-2. The LTC4313-3 n PMBus does not have RTAs. n Servers L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6356140, 6650174, 7032051, 7478286.
Typical applicaTion
3.3V 5V
400kHz Operation
RBUS_IN = 2.7kΩ, CBUS_IN = 50pF 0.01µF V R CC BUS_OUT = 1.3kΩ, CBUS_OUT = 100pF 2.7k 2.7k 10k 1.3k 1.3k SCLOUT ENABLE LTC4313-1 1V/DIV SCLIN READY READY SCL1 SCLIN SCLOUT SCL2 SDA1 SDAIN SDAOUT SDA2 GND 4313123 TA01b 4313123 TA01a 500ns/DIV 4313123f 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts
FeaTures DescripTion
n
Bidirectional Buffer Increases Fanout
The LTC®4313 is a hot swappable 2-wire bus buffer n
High Noise Margin with VIL = 0.3•VCC
that provides bidirectional buffering while maintain- n
Compatible with Non-Compliant I2C Devices That
ing a low offset voltage and high noise margin up to
Drive a High V
0.3 • V
OL
CC. The high noise margin allows the LTC4313 to be n
Strong (LTC4313-1) and 2.5mA (LTC4313-2)
interoperable with devices that drive a high VOL (>0.4V) and
Rise Time Accelerator Current
allows multiple LTC4313s to be cascaded. The LTC4313-1 n
Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
and LTC4313-2 support level translation between 3.3V and n Prevents SDA and SCL Corruption During Live Board 5V busses. In addition to these voltages, the LTC4313-3 Insertion and Removal from Backplane also supports level translation to 1.5V, 1.8V and 2.5V. n Stuck Bus Disconnect and Recovery During insertion, the SDA and SCL lines are pre-charged to n Compatible with I2C, I2C Fast Mode and SMBus 1V to minimize bus disturbances. Connection is established n ±4kV Human Body Model ESD Ruggedness between the input and output after ENABLE is asserted n High Impedance SDA, SCL Pins When Unpowered high and a stop bit or bus idle condition has been detected n 8-Lead MSOP and 8-Lead (3mm × 3mm) DFN on the SDA and SCL pins. Packages If both data and clock are not simultaneously high at least once in 45ms, the input is disconnected from the output.
applicaTions
Up to 16 clock pulses are subsequently generated to free the stuck bus. Rise time accelerators (RTAs) provide pull-up n Capacitance Buffers/Bus Extender currents on SDA and SCL rising edges to meet rise time n Live Board Insertion specifications in heavily loaded systems. The RTAs are n Telecommunications Systems Including ATCA configured as slew limited switches in the LTC4313-1 and n Level Translation 2.5mA current sources in the LTC4313-2. The LTC4313-3 n PMBus does not have RTAs. n Servers L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6356140, 6650174, 7032051, 7478286.
Typical applicaTion
3.3V 5V
400kHz Operation
RBUS_IN = 2.7kΩ, CBUS_IN = 50pF 0.01µF V R CC BUS_OUT = 1.3kΩ, CBUS_OUT = 100pF 2.7k 2.7k 10k 1.3k 1.3k SCLOUT ENABLE LTC4313-1 1V/DIV SCLIN READY READY SCL1 SCLIN SCLOUT SCL2 SDA1 SDAIN SDAOUT SDA2 GND 4313123 TA01b 4313123 TA01a 500ns/DIV 4313123f 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts