Datasheet LTC4313-1, LTC4313-2, LTC4313-3 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | 2-Wire Bus Buffers with High Noise Margin |
| Páginas / Página | 20 / 10 — applicaTions inForMaTion Falling Edge Characteristics. Stuck Bus … |
| Formato / tamaño de archivo | PDF / 296 Kb |
| Idioma del documento | Inglés |
applicaTions inForMaTion Falling Edge Characteristics. Stuck Bus Disconnect and Recovery
Línea de modelo para esta hoja de datos
- LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LTC4313CDD-2#PBF LTC4313CDD-2#TRPBF LTC4313CDD-3#PBF LTC4313CDD-3#TRPBF LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTC4313CMS8-2#PBF LTC4313CMS8-2#TRPBF LTC4313CMS8-3#PBF LTC4313CMS8-3#TRPBF LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LTC4313IDD-2#PBF LTC4313IDD-2#TRPBF LTC4313IDD-3#PBF LTC4313IDD-3#TRPBF LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF LTC4313IMS8-2#PBF LTC4313IMS8-2#TRPBF LTC4313IMS8-3#PBF LTC4313IMS8-3#TRPBF
- LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF
Versión de texto del documento
LTC4313-1/LTC4313-2/ LTC4313-3
applicaTions inForMaTion Falling Edge Characteristics
40µs the LTC4313 generates up to sixteen 5.5KHz clock The LTC4313 introduces a propagation delay on falling pulses on the SCLOUT pin. Should the stuck bus release edges due to the finite response time and the finite current high during this period, clock generation is stopped and sink capability of the buffers. In addition the LTC4313 also a stop bit is generated. This process is shown in Figure 4 slew limits the falling edge to an edge rate of 45V/µs (typ). for the case where SDAOUT starts out stuck low and The slew limited falling edge eliminates fast transitions then recovers. As seen from Figure 4, the LTC4313 pulls on the busses and minimizes transmission line effects in READY low and breaks the connection between the input systems. Refer to the Typical Performance Characteristics and output sides, when a stuck low condition on SDA is section for the propagation delay and fall times as a func- detected. Clock pulses are then issued on SCLOUT to at- tion of the bus capacitance. tempt to unstick the SDAOUT bus. When SDAOUT recovers, clock pulsing is stopped, a stop bit is generated on the
Stuck Bus Disconnect and Recovery
output and READY is released high. When powering up into a stuck low condition, a connection is never made During an output bus stuck low condition (SCLOUT and between the input and the output, as a stop bit or bus SDAOUT have not been simultaneously high at least once idle condition is never detected. After a timeout period of in 45ms), the LTC4313 attempts to unstick the bus by first 45ms, the behavior is the same as described previously. breaking the connection between the input and output. After READY 5V/DIV SCLOUT AUTOMATIC CLOCKING 5V/DIV DISCONNECT AT TIMEOUT SDAIN 5V/DIV STOP BIT GENERATED RECOVERS HIGH SDAOUT STUCK LOW > 45ms DRIVEN LOW 5V/DIV 4313123 F04 1ms/DIV
Figure 4. Bus Waveforms During SDAOUT Stuck Low and Recovery Event
4313123f 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts
applicaTions inForMaTion Falling Edge Characteristics
40µs the LTC4313 generates up to sixteen 5.5KHz clock The LTC4313 introduces a propagation delay on falling pulses on the SCLOUT pin. Should the stuck bus release edges due to the finite response time and the finite current high during this period, clock generation is stopped and sink capability of the buffers. In addition the LTC4313 also a stop bit is generated. This process is shown in Figure 4 slew limits the falling edge to an edge rate of 45V/µs (typ). for the case where SDAOUT starts out stuck low and The slew limited falling edge eliminates fast transitions then recovers. As seen from Figure 4, the LTC4313 pulls on the busses and minimizes transmission line effects in READY low and breaks the connection between the input systems. Refer to the Typical Performance Characteristics and output sides, when a stuck low condition on SDA is section for the propagation delay and fall times as a func- detected. Clock pulses are then issued on SCLOUT to at- tion of the bus capacitance. tempt to unstick the SDAOUT bus. When SDAOUT recovers, clock pulsing is stopped, a stop bit is generated on the
Stuck Bus Disconnect and Recovery
output and READY is released high. When powering up into a stuck low condition, a connection is never made During an output bus stuck low condition (SCLOUT and between the input and the output, as a stop bit or bus SDAOUT have not been simultaneously high at least once idle condition is never detected. After a timeout period of in 45ms), the LTC4313 attempts to unstick the bus by first 45ms, the behavior is the same as described previously. breaking the connection between the input and output. After READY 5V/DIV SCLOUT AUTOMATIC CLOCKING 5V/DIV DISCONNECT AT TIMEOUT SDAIN 5V/DIV STOP BIT GENERATED RECOVERS HIGH SDAOUT STUCK LOW > 45ms DRIVEN LOW 5V/DIV 4313123 F04 1ms/DIV
Figure 4. Bus Waveforms During SDAOUT Stuck Low and Recovery Event
4313123f 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts