Datasheet AD8363 (Analog Devices) - 2
| Fabricante | Analog Devices |
| Descripción | 50 Hz TO 6 GHz 50 dB TruPwr™ Detector |
| Páginas / Página | 30 / 2 — AD8363* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 1.8 Mb |
| Idioma del documento | Inglés |
AD8363* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017. COMPARABLE PARTS. DESIGN RESOURCES. EVALUATION KITS
Versión de texto del documento
AD8363* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017 COMPARABLE PARTS DESIGN RESOURCES
View a parametric search of comparable parts. • AD8363 Material Declaration • PCN-PDN Information
EVALUATION KITS
• Quality And Reliability • AD8363 Evaluation Board • Symbols and Footprints
DOCUMENTATION DISCUSSIONS Application Notes
View all AD8363 EngineerZone Discussions. • AN-1040: RF Power Calibration Improves Performance of Wireless Transmitters
SAMPLE AND BUY Data Sheet
Visit the product page to see pricing options. • AD8363: 50 Hz to 6 GHz, 50 dB TruPwr™ Detector Data Sheet
TECHNICAL SUPPORT
Submit a technical question or find your regional support
TOOLS AND SIMULATIONS
number. • ADIsimPLL™ • ADIsimRF
DOCUMENT FEEDBACK
• AD8363 S-Parameters Submit feedback for this data sheet.
REFERENCE MATERIALS Product Selection Guide
• RF Source Booklet
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE CHOICE OF RF INPUT PIN SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE MEASUREMENT MODE BASIC CONNECTIONS SYSTEM CALIBRATION AND ERROR CALCULATION OPERATION TO 125°C OUTPUT VOLTAGE SCALING OFFSET COMPENSATION, MINIMUM CLPF, AND MAXIMUM CHPF CAPACITANCE VALUES CHOOSING A VALUE FOR CLPF RF PULSE RESPONSE AND VTGT CONTROLLER MODE BASIC CONNECTIONS CONSTANT OUTPUT POWER OPERATION DESCRIPTION OF RF CHARACTERIZATION EVALUATION AND CHARACTERIZATION CIRCUIT BOARD LAYOUTS ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE
View a parametric search of comparable parts. • AD8363 Material Declaration • PCN-PDN Information
EVALUATION KITS
• Quality And Reliability • AD8363 Evaluation Board • Symbols and Footprints
DOCUMENTATION DISCUSSIONS Application Notes
View all AD8363 EngineerZone Discussions. • AN-1040: RF Power Calibration Improves Performance of Wireless Transmitters
SAMPLE AND BUY Data Sheet
Visit the product page to see pricing options. • AD8363: 50 Hz to 6 GHz, 50 dB TruPwr™ Detector Data Sheet
TECHNICAL SUPPORT
Submit a technical question or find your regional support
TOOLS AND SIMULATIONS
number. • ADIsimPLL™ • ADIsimRF
DOCUMENT FEEDBACK
• AD8363 S-Parameters Submit feedback for this data sheet.
REFERENCE MATERIALS Product Selection Guide
• RF Source Booklet
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE CHOICE OF RF INPUT PIN SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE MEASUREMENT MODE BASIC CONNECTIONS SYSTEM CALIBRATION AND ERROR CALCULATION OPERATION TO 125°C OUTPUT VOLTAGE SCALING OFFSET COMPENSATION, MINIMUM CLPF, AND MAXIMUM CHPF CAPACITANCE VALUES CHOOSING A VALUE FOR CLPF RF PULSE RESPONSE AND VTGT CONTROLLER MODE BASIC CONNECTIONS CONSTANT OUTPUT POWER OPERATION DESCRIPTION OF RF CHARACTERIZATION EVALUATION AND CHARACTERIZATION CIRCUIT BOARD LAYOUTS ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE