Datasheet AD8363 (Analog Devices)
Fabricante | Analog Devices |
Descripción | 50 Hz TO 6 GHz 50 dB TruPwr™ Detector |
Páginas / Página | 30 / 1 — 50 Hz to 6 GHz,. 50 dB TruPwr™ Detector. Data Sheet. AD8363. FEATURES. … |
Revisión | B |
Formato / tamaño de archivo | PDF / 1.8 Mb |
Idioma del documento | Inglés |
50 Hz to 6 GHz,. 50 dB TruPwr™ Detector. Data Sheet. AD8363. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Versión de texto del documento
50 Hz to 6 GHz, 50 dB TruPwr™ Detector Data Sheet AD8363 FEATURES FUNCTIONAL BLOCK DIAGRAM Accurate rms-to-dc conversion from 50 Hz to 6 GHz VTGT VREF VPOS COMM 12 11 10 9 Single-ended input dynamic range of >50 dB No balun or external input tuning required NC 13 AD8363 8 TEMP Waveform and modulation independent RF power detection Linear-in-decibels output, scaled: 52 mV/dB X2 Log conformance error: <±0.15 dB INHI 14 7 VSET Temperature stability: <±0.5 dB Voltage supply range: 4.5 V to 5.5 V X2 Operating temperature range: −40°C to +125°C INLO 15 6 VOUT Power-down capability to 1.5 mW Small footprint, 4 mm × 4 mm, LFCSP TCM1 16 5 CLPF APPLICATIONS
1
Power amplifier linearization/control loops 3
-00
1 2 4
68
TCM2/PWDN CHPF VPOS COMM
073
Multi-Standard, Multi-Carrier Wireless Infrastructure
Figure 1. AD8363 Block Diagram
(MCGSM, CDMA, WCDMA, TD-SCDMA, WiMAX, LTE) Transmitter power control Transmitter signal strength indication (TSSI) RF instrumentation GENERAL DESCRIPTION
The AD8363 is a true rms responding power detector that can Used as a power measurement device, VOUT is connected to be directly driven with a single-ended 50 Ω source. This feature VSET. The output is then proportional to the logarithm of the makes the AD8363 frequency versatile by eliminating the need rms value of the input. The reading is presented directly in for a balun or any other form of external input tuning for operation decibels and is conveniently scaled to 52 mV/dB, or approximately up to 6 GHz. 1 V per decade; however, other slopes are easily arranged. In The AD8363 provides an accurate power measurement, controller mode, the voltage applied to VSET determines the independent of waveform, for a variety of high frequency power level required at the input to null the deviation from the communication and instrumentation systems. Requiring only setpoint. The output buffer can provide high load currents. a single supply of 5 V and a few capacitors, it is easy to use and The AD8363 has 1.5 mW power consumption when powered provides high measurement accuracy. The AD8363 can operate down by a logic high applied to the TCM2/PWDN pin. It powers from arbitrarily low frequencies to 6 GHz and can accept inputs up within about 30 μs to its nominal operating current of 60 mA at that have rms values from less than −50 dBm to at least 0 dBm, 25°C. The AD8363 is available in a 4 mm × 4 mm 16-lead LFCSP with large crest factors exceeding the requirements for accurate for operation over the −40°C to +125°C temperature range. measurement of WiMAX, CDMA, W-CDMA, TD-SCDMA, A fully populated RoHS compliant evaluation board is also multicarrier GSM, and LTE signals. available. The AD8363 can determine the true power of a high frequency signal having a complex low frequency modulation envelope, or it can be used as a simple low frequency rms voltmeter. The high- pass corner generated by its internal offset-nulling loop can be lowered by a capacitor added on the CHPF pin.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE CHOICE OF RF INPUT PIN SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE MEASUREMENT MODE BASIC CONNECTIONS SYSTEM CALIBRATION AND ERROR CALCULATION OPERATION TO 125°C OUTPUT VOLTAGE SCALING OFFSET COMPENSATION, MINIMUM CLPF, AND MAXIMUM CHPF CAPACITANCE VALUES CHOOSING A VALUE FOR CLPF RF PULSE RESPONSE AND VTGT CONTROLLER MODE BASIC CONNECTIONS CONSTANT OUTPUT POWER OPERATION DESCRIPTION OF RF CHARACTERIZATION EVALUATION AND CHARACTERIZATION CIRCUIT BOARD LAYOUTS ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE