Datasheet AD8251 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | 10 MHz, G = 1, 2, 4, 8 iCMOS Programmable Gain Instrumentation Amplifier |
| Páginas / Página | 25 / 7 — AD8251. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. 2.00. ) 1.75. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 690 Kb |
| Idioma del documento | Inglés |
AD8251. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. 2.00. ) 1.75. MAXIMUM POWER DISSIPATION. W ( N. 1.50. IO T A. IP 1.25. ISS D
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AD8251 ABSOLUTE MAXIMUM RATINGS Table 3.
The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the
Parameter Rating
package due to the load drive for all outputs. The quiescent Supply Voltage ±17 V power is the voltage between the supply pins (V Power Dissipation See Figure 4 S) times the quiescent current (I Output Short-Circuit Current Indefinite1 S). Assuming the load (RL) is referenced to midsupply, the total drive power is V Common-Mode Input Voltage +V S/2 × IOUT, some of which is S + 13 V to −VS − 13 V dissipated in the package and some in the load (V Differential Input Voltage +V OUT × IOUT). S + 13 V, −VS − 13 V2 Digital Logic Inputs ±V The difference between the total drive power and the load S Storage Temperature Range −65°C to +125°C power is the drive power dissipated in the package. Operating Temperature Range3 −40°C to +85°C PD = Quiescent Power + (Total Drive Power − Load Power) Lead Temperature (Soldering, 10 sec) 300°C 2 ⎛ ⎞ Junction Temperature 140°C V V V P = V × I + × – D ( ) S OUT OUT S S ⎜⎜ ⎟⎟ θ 2 R R JA (Four-Layer JEDEC Standard Board) 112°C/W ⎝ L ⎠ L Package Glass Transition Temperature 140°C In single-supply operation with RL referenced to −VS, the worst case is V 1 Assumes the load is referenced to midsupply. OUT = VS/2. 2 Current must be kept to less than 6 mA. Airflow increases heat dissipation, effectively reducing θ 3 Temperature for specified performance is −40°C to +85°C. For performance JA. In to +125°C, see the Typical Performance Characteristics section. addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes Stresses above those listed under Absolute Maximum Ratings reduces the θJA. may cause permanent damage to the device. This is a stress Figure 4 shows the maximum safe power dissipation in the rating only; functional operation of the device at these or any package vs. the ambient temperature on a four-layer JEDEC other conditions above those indicated in the operational section of standard board. this specification is not implied. Exposure to absolute maximum
2.00
rating conditions for extended periods may affect device reliability.
) 1.75 MAXIMUM POWER DISSIPATION W ( N
The maximum safe power dissipation in the AD8251 package is
1.50 IO T A
limited by the associated rise in junction temperature (TJ) on
IP 1.25
the die. The plastic encapsulating the die locally reaches the
ISS D
junction temperature. At approximately 140°C, which is the
R 1.00 E W
glass transition temperature, the plastic changes its properties.
0.75 PO
Even temporarily exceeding this temperature limit can change
M 0.50
the stresses that the package exerts on the die, permanently
IMU X
shifting the parametric performance of the AD8251. Exceeding
MA 0.25
a junction temperature of 140°C for an extended period can
0
result in changes in silicon devices, potentially causing failure.
–40 –20 0 20 40 60 80 100 120
04 0 7-
AMBIENT TEMPERATURE (°C)
28 The still air thermal properties of the package and PCB (θ 06 JA), Figure 4. Maximum Power Dissipation vs. Ambient Temperature the ambient temperature (TA), and the total power dissipated in the package (PD) determine the junction temperature of the die.
ESD CAUTION
The junction temperature is calculated as T = T + P × θ J A ( D JA) Rev. B | Page 6 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ADC APPLICATIONS DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE
AD8251 ABSOLUTE MAXIMUM RATINGS Table 3.
The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the
Parameter Rating
package due to the load drive for all outputs. The quiescent Supply Voltage ±17 V power is the voltage between the supply pins (V Power Dissipation See Figure 4 S) times the quiescent current (I Output Short-Circuit Current Indefinite1 S). Assuming the load (RL) is referenced to midsupply, the total drive power is V Common-Mode Input Voltage +V S/2 × IOUT, some of which is S + 13 V to −VS − 13 V dissipated in the package and some in the load (V Differential Input Voltage +V OUT × IOUT). S + 13 V, −VS − 13 V2 Digital Logic Inputs ±V The difference between the total drive power and the load S Storage Temperature Range −65°C to +125°C power is the drive power dissipated in the package. Operating Temperature Range3 −40°C to +85°C PD = Quiescent Power + (Total Drive Power − Load Power) Lead Temperature (Soldering, 10 sec) 300°C 2 ⎛ ⎞ Junction Temperature 140°C V V V P = V × I + × – D ( ) S OUT OUT S S ⎜⎜ ⎟⎟ θ 2 R R JA (Four-Layer JEDEC Standard Board) 112°C/W ⎝ L ⎠ L Package Glass Transition Temperature 140°C In single-supply operation with RL referenced to −VS, the worst case is V 1 Assumes the load is referenced to midsupply. OUT = VS/2. 2 Current must be kept to less than 6 mA. Airflow increases heat dissipation, effectively reducing θ 3 Temperature for specified performance is −40°C to +85°C. For performance JA. In to +125°C, see the Typical Performance Characteristics section. addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes Stresses above those listed under Absolute Maximum Ratings reduces the θJA. may cause permanent damage to the device. This is a stress Figure 4 shows the maximum safe power dissipation in the rating only; functional operation of the device at these or any package vs. the ambient temperature on a four-layer JEDEC other conditions above those indicated in the operational section of standard board. this specification is not implied. Exposure to absolute maximum
2.00
rating conditions for extended periods may affect device reliability.
) 1.75 MAXIMUM POWER DISSIPATION W ( N
The maximum safe power dissipation in the AD8251 package is
1.50 IO T A
limited by the associated rise in junction temperature (TJ) on
IP 1.25
the die. The plastic encapsulating the die locally reaches the
ISS D
junction temperature. At approximately 140°C, which is the
R 1.00 E W
glass transition temperature, the plastic changes its properties.
0.75 PO
Even temporarily exceeding this temperature limit can change
M 0.50
the stresses that the package exerts on the die, permanently
IMU X
shifting the parametric performance of the AD8251. Exceeding
MA 0.25
a junction temperature of 140°C for an extended period can
0
result in changes in silicon devices, potentially causing failure.
–40 –20 0 20 40 60 80 100 120
04 0 7-
AMBIENT TEMPERATURE (°C)
28 The still air thermal properties of the package and PCB (θ 06 JA), Figure 4. Maximum Power Dissipation vs. Ambient Temperature the ambient temperature (TA), and the total power dissipated in the package (PD) determine the junction temperature of the die.
ESD CAUTION
The junction temperature is calculated as T = T + P × θ J A ( D JA) Rev. B | Page 6 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ADC APPLICATIONS DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE