Datasheet AD8253 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | 10 MHz, G = 1, 10, 100, 1000 iCMOS Programmable Gain Instrumentation Amplifier |
| Páginas / Página | 25 / 6 — Data Sheet. AD8253. Parameter. Conditions. Min. Typ. Max. Unit. TIMING … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 480 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD8253. Parameter. Conditions. Min. Typ. Max. Unit. TIMING DIAGRAM. tWR-HIGH. tWR-LOW. tSU. tHD. A0, A1
Versión de texto del documento
link to page 18
Data Sheet AD8253 Parameter Conditions Min Typ Max Unit
POWER SUPPLY Operating Range ±5 ±15 V Quiescent Current, +IS 4.6 5.3 mA Quiescent Current, −IS 4.5 5.3 mA Over Temperature T = −40°C to +85°C 6 mA TEMPERATURE RANGE Specified Performance −40 +85 °C 1 See Figure 20 for CMRR vs. frequency for more information on typical performance over frequency. 2 Input bias current over temperature: minimum at hot and maximum at cold. 3 See Figure 30 for input voltage limit vs. supply voltage and temperature. 4 See Figure 32, Figure 33, and Figure 34 for output voltage swing vs. supply voltage and temperature for various loads. 5 Add time for the output to slew and settle to calculate the total time for a gain change.
TIMING DIAGRAM tWR-HIGH tWR-LOW WR tSU tHD A0, A1
03 -0 83 69 0 Figure 3. Timing Diagram for Latched Gain Mode (See the Timing for Latched Gain Mode Section) Rev. B | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ANALOG-TO-DIGITAL CONVERTER APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD8253 Parameter Conditions Min Typ Max Unit
POWER SUPPLY Operating Range ±5 ±15 V Quiescent Current, +IS 4.6 5.3 mA Quiescent Current, −IS 4.5 5.3 mA Over Temperature T = −40°C to +85°C 6 mA TEMPERATURE RANGE Specified Performance −40 +85 °C 1 See Figure 20 for CMRR vs. frequency for more information on typical performance over frequency. 2 Input bias current over temperature: minimum at hot and maximum at cold. 3 See Figure 30 for input voltage limit vs. supply voltage and temperature. 4 See Figure 32, Figure 33, and Figure 34 for output voltage swing vs. supply voltage and temperature for various loads. 5 Add time for the output to slew and settle to calculate the total time for a gain change.
TIMING DIAGRAM tWR-HIGH tWR-LOW WR tSU tHD A0, A1
03 -0 83 69 0 Figure 3. Timing Diagram for Latched Gain Mode (See the Timing for Latched Gain Mode Section) Rev. B | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ANALOG-TO-DIGITAL CONVERTER APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE