Datasheet AD8253 (Analog Devices) - 5

FabricanteAnalog Devices
Descripción10 MHz, G = 1, 10, 100, 1000 iCMOS Programmable Gain Instrumentation Amplifier
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RevisiónB
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AD8253. Data Sheet. Parameter. Conditions. Min. Typ. Max. Unit

AD8253 Data Sheet Parameter Conditions Min Typ Max Unit

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AD8253 Data Sheet Parameter Conditions Min Typ Max Unit
Settling Time 0.001% ΔOUT = 10 V step G = 1 780 ns G = 10 880 ns G =100 1.8 μs G = 1000 1.8 μs Slew Rate G = 1 20 V/μs G = 10 20 V/μs G = 100 12 V/μs G = 1000 2 V/μs Total Harmonic Distortion + Noise f = 1 kHz, RL = 10 kΩ, ±10 V, −110 dB G = 1, 10 Hz to 22 kHz band- pass filter GAIN Gain Range G = 1, 10, 100, 1000 1 1000 V/V Gain Error OUT = ±10 V G = 1 0.03 % G = 10, 100, 1000 0.04 % Gain Nonlinearity OUT = −10 V to +10 V G = 1 RL = 10 kΩ, 2 kΩ, 600 Ω 5 ppm G = 10 RL = 10 kΩ, 2 kΩ, 600 Ω 3 ppm G = 100 RL = 10 kΩ, 2 kΩ, 600 Ω 18 ppm G = 1000 RL = 10 kΩ, 2 kΩ, 600 Ω 110 ppm Gain vs. Temperature All gains 3 10 ppm/°C INPUT Input Impedance Differential 4||1.25 GΩpF Common Mode 1||5 GΩpF Input Operating Voltage Range VS = ±5 V to ±15 V −VS + 1 +VS − 1.5 V Over Temperature3 T = −40°C to +85°C −VS + 1.2 +VS − 1.7 V OUTPUT Output Swing −13.7 +13.6 V Over Temperature4 T = −40°C to +85°C −13.7 +13.6 V Short-Circuit Current 37 mA REFERENCE INPUT RIN 20 kΩ IIN +IN, −IN, REF = 0 1 μA Voltage Range −VS +VS V Gain to Output 1 ± 0.0001 V/V DIGITAL LOGIC Digital Ground Voltage, DGND Referred to GND −VS + 4.25 0 +VS − 2.7 V Digital Input Voltage Low Referred to GND DGND 2.1 V Digital Input Voltage High Referred to GND 2.8 +VS V Digital Input Current 1 μA Gain Switching Time5 325 ns tSU See Figure 3 timing diagram 15 ns tHD 30 ns t WR -LOW 20 ns t WR -HIGH 15 ns Rev. B | Page 4 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ANALOG-TO-DIGITAL CONVERTER APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE