Datasheet AD5382 (Analog Devices) - 3

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AD5382 Data Sheet TABLE OF CONTENTS
Features .. 1  SFR Commands .. 23  Integrated Functions .. 1  Hardware Functions ... 26  Applications ... 1  Reset Function .. 26  Functional Block Diagram .. 1  Asynchronous Clear Function .. 26  Revision History ... 3  BUSY and LDAC Functions.. 26  General Description ... 4  FIFO Operation in Parallel Mode .. 26  Specifications ... 5  Power-On Reset .. 26  AD5382-5 Specifications ... 5  Power-Down ... 26  AD5382-3 Specifications ... 7  AD5382 Interfaces .. 27  AC Characteristics .. 8  DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces ... 27  Timing Characteristics ... 9  I2C Serial Interface ... 29  SPI-, QSPI-, MICROWIRE-, or DSP-Compatible Serial Parallel Interface ... 31  Interface ... 9  Microprocessor Interfacing ... 32  I2C Serial Interface .. 11  Applications Information .. 34  Parallel Interface ... 12  Power Supply Decoupling ... 34  Absolute Maximum Ratings .. 14  Power Supply Sequencing ... 34  ESD Caution .. 14  Typical Configuration Circuit .. 35  Pin Configuration and Function Descriptions ... 15  Monitor Function ... 36  Terminology .. 18  Toggle Mode Function ... 36  Typical Performance Characteristics ... 19  Thermal Monitor Function ... 37  Functional Description .. 22  AD5382 in a MEMS-Based Optical Switch .. 37  DAC Architecture—General ... 22  Optical Attenuators .. 37  Data Decoding .. 22  Outline Dimensions ... 39  On-Chip Special Function Registers (SFR) .. 23  Ordering Guide .. 39  Rev. D | Page 2 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table of Contents Revision History General Description Specifications AD5382-5 Specifications AD5382-3 Specifications AC Characteristics Timing Characteristics SPI-, QSPI-, MICROWIRE-, or DSP-Compatible Serial Interface I2C Serial Interface Parallel Interface Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write Clear Code Soft Clear Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Control Register Contents Channel Monitor Function Hardware Functions Reset Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down AD5382 Interfaces DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer Start and Stop Conditions Repeated Start Conditions Acknowledge Bit (ACK) AD5382 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pins A4 to A0 Pins DB13 to DB0 Microprocessor Interfacing Parallel Interface AD5382 to MC68HC11 AD5382 to PIC16C6x/7x AD5382 to 8051 AD5382 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit Monitor Function Toggle Mode Function Thermal Monitor Function AD5382 in a MEMS-Based Optical Switch Optical Attenuators Outline Dimensions Ordering Guide