Datasheet AD7880 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | CMOS, Single +5 V Supply, Low Power, 12-Bit Sampling ADC |
| Páginas / Página | 17 / 8 — AD7880. Signal-to-Noise Ratio (SNR). 10 k. 500. INA. AD7880*. AGND. … |
| Formato / tamaño de archivo | PDF / 375 Kb |
| Idioma del documento | Inglés |
AD7880. Signal-to-Noise Ratio (SNR). 10 k. 500. INA. AD7880*. AGND. *ADDITIONAL PINS OMITTED FOR CLARITY. Unipolar Adjustments
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AD7880 R1 Signal-to-Noise Ratio (SNR) 10 k
Ω SNR is the measured signal-to-noise ratio at the output of the
V1
ADC. The signal is the rms magnitude of the fundamental. Noise is the rms sum of all the nonfundamental signals up to
R2 + 500
Ω half the sampling frequency (FS/2) excluding dc. SNR is depen-
V – INA R4
dent upon the number of quantization levels used in the digiti-
10 k
Ω zation process; the more levels, the smaller the quantization
R3 AD7880*
noise. The theoretical signal to noise ratio for a sine wave input
10 k
Ω
R5 10 k
Ω is given by:
AGND
SNR = (6.02 N + 1.76) dB (1)
*ADDITIONAL PINS OMITTED FOR CLARITY
where N is the number of bits. Thus for an ideal 12-bit converter, SNR = 74 dB. Figure 11. Offset and Full-Scale Adjust Circuit The output spectrum from the ADC is evaluated by applying a
Unipolar Adjustments
sine wave signal of very low distortion to the VIN input which is In the case of the 0 V to 5 V unipolar input configuration, unipolar sampled at a 66 kHz sampling rate. A Fast Fourier Transform offset error must be adjusted before full-scale error. Adjustment is (FFT) plot is generated from which the SNR data can be ob- achieved by trimming the offset of the op amp driving the ana- tained. Figure 12 shows a typical 2048 point FFT plot of the log input of the AD7880. This is done by applying an input AD7880 with an input signal of 2.5 kHz and a sampling fre- voltage of 0.61 mV (1/2 LSB) to V1 in Figure 11 and adjusting quency of 61 kHz. The SNR obtained from this graph is 73 dB. the op amp offset voltage until the ADC output code flickers It should be noted that the harmonics are taken into account between 0000 0000 0000 and 0000 0000 0001. For full-scale when calculating the SNR. adjustment, an input voltage of 4.9982 V (FS–3/2 LSBs) is applied to V1 and R2 is adjusted until the output code flickers between 1111 1111 1110 and 1111 1111 1111. The same procedure is required for the 0 V to 10 V input con- figuration of Figure 6. An input voltage of 1.22 mV (1/2 LSB) is applied to V1 in Figure 11 and the op amp’s offset voltage is adjusted until the ADC output code flickers between 0000 0000 0000 and 0000 0000 0001. For full-scale adjustment, an input voltage of 9.9963 V (FS–3/2 LSBs) is applied to V1 and R2 is adjusted until the output code flickers between 1111 1111 1110 and 1111 1111 1111.
Bipolar Adjustments
Bipolar zero and full-scale errors for the bipolar input configura- tion of Figure 7 are adjusted in a similar fashion to the unipolar case. Again, bipolar zero error must be adjusted before full-scale error. Bipolar zero error adjustment is achieved by trimming the offset of the op amp driving the analog input of the AD7880 while the input voltage is 1/2 LSB below ground. This is done by applying an input voltage of –1.22 mV (1/2 LSB) to V1 in Figure 12. FFT Plot Figure 11 and adjusting the op amp offset voltage until the ADC output code flickers between 0111 1111 1111 and 1000
Effective Number of Bits
0000 0000. For full-scale adjustment, an input voltage of The formula given in Equation 1 relates the SNR to the number 4.9982 V (FS/2–3/2 LSBs) is applied to V of bits. Rewriting the formula, as in Equation 2, it is possible to 1 and R2 is adjusted until the output code flickers between 1111 1111 1110 and get a measure of performance expressed in effective number of 1111 1111 1111. bits (N).
DYNAMIC SPECIFICATIONS
N = SNR − 1.76 (2) 6.02 The AD7880 is specified and tested for dynamic performance specifications as well as traditional dc specifications such as The effective number of bits for a device can be calculated integral and differential nonlinearity. The ac specifications are directly from its measured SNR. required for signal processing applications such as speech recog- Figure 13 shows a plot of effective number of bits versus input nition, spectrum analysis and high speed modems. These appli- frequency for an AD7880 with a sampling frequency of 61 kHz. cations require information on the ADC’s effect on the spectral The effective number of bits typically remains better than 11.5 content of the input signal. Hence, the parameters for which the for frequencies up to 12 kHz. AD7880 is specified include SNR, harmonic distortion, inter- modulation distortion and peak harmonics. These terms are dis- cussed in more detail in the following sections. REV. 0 –7–
Ω SNR is the measured signal-to-noise ratio at the output of the
V1
ADC. The signal is the rms magnitude of the fundamental. Noise is the rms sum of all the nonfundamental signals up to
R2 + 500
Ω half the sampling frequency (FS/2) excluding dc. SNR is depen-
V – INA R4
dent upon the number of quantization levels used in the digiti-
10 k
Ω zation process; the more levels, the smaller the quantization
R3 AD7880*
noise. The theoretical signal to noise ratio for a sine wave input
10 k
Ω
R5 10 k
Ω is given by:
AGND
SNR = (6.02 N + 1.76) dB (1)
*ADDITIONAL PINS OMITTED FOR CLARITY
where N is the number of bits. Thus for an ideal 12-bit converter, SNR = 74 dB. Figure 11. Offset and Full-Scale Adjust Circuit The output spectrum from the ADC is evaluated by applying a
Unipolar Adjustments
sine wave signal of very low distortion to the VIN input which is In the case of the 0 V to 5 V unipolar input configuration, unipolar sampled at a 66 kHz sampling rate. A Fast Fourier Transform offset error must be adjusted before full-scale error. Adjustment is (FFT) plot is generated from which the SNR data can be ob- achieved by trimming the offset of the op amp driving the ana- tained. Figure 12 shows a typical 2048 point FFT plot of the log input of the AD7880. This is done by applying an input AD7880 with an input signal of 2.5 kHz and a sampling fre- voltage of 0.61 mV (1/2 LSB) to V1 in Figure 11 and adjusting quency of 61 kHz. The SNR obtained from this graph is 73 dB. the op amp offset voltage until the ADC output code flickers It should be noted that the harmonics are taken into account between 0000 0000 0000 and 0000 0000 0001. For full-scale when calculating the SNR. adjustment, an input voltage of 4.9982 V (FS–3/2 LSBs) is applied to V1 and R2 is adjusted until the output code flickers between 1111 1111 1110 and 1111 1111 1111. The same procedure is required for the 0 V to 10 V input con- figuration of Figure 6. An input voltage of 1.22 mV (1/2 LSB) is applied to V1 in Figure 11 and the op amp’s offset voltage is adjusted until the ADC output code flickers between 0000 0000 0000 and 0000 0000 0001. For full-scale adjustment, an input voltage of 9.9963 V (FS–3/2 LSBs) is applied to V1 and R2 is adjusted until the output code flickers between 1111 1111 1110 and 1111 1111 1111.
Bipolar Adjustments
Bipolar zero and full-scale errors for the bipolar input configura- tion of Figure 7 are adjusted in a similar fashion to the unipolar case. Again, bipolar zero error must be adjusted before full-scale error. Bipolar zero error adjustment is achieved by trimming the offset of the op amp driving the analog input of the AD7880 while the input voltage is 1/2 LSB below ground. This is done by applying an input voltage of –1.22 mV (1/2 LSB) to V1 in Figure 12. FFT Plot Figure 11 and adjusting the op amp offset voltage until the ADC output code flickers between 0111 1111 1111 and 1000
Effective Number of Bits
0000 0000. For full-scale adjustment, an input voltage of The formula given in Equation 1 relates the SNR to the number 4.9982 V (FS/2–3/2 LSBs) is applied to V of bits. Rewriting the formula, as in Equation 2, it is possible to 1 and R2 is adjusted until the output code flickers between 1111 1111 1110 and get a measure of performance expressed in effective number of 1111 1111 1111. bits (N).
DYNAMIC SPECIFICATIONS
N = SNR − 1.76 (2) 6.02 The AD7880 is specified and tested for dynamic performance specifications as well as traditional dc specifications such as The effective number of bits for a device can be calculated integral and differential nonlinearity. The ac specifications are directly from its measured SNR. required for signal processing applications such as speech recog- Figure 13 shows a plot of effective number of bits versus input nition, spectrum analysis and high speed modems. These appli- frequency for an AD7880 with a sampling frequency of 61 kHz. cations require information on the ADC’s effect on the spectral The effective number of bits typically remains better than 11.5 content of the input signal. Hence, the parameters for which the for frequencies up to 12 kHz. AD7880 is specified include SNR, harmonic distortion, inter- modulation distortion and peak harmonics. These terms are dis- cussed in more detail in the following sections. REV. 0 –7–