Datasheet AD7880 (Analog Devices) - 7

FabricanteAnalog Devices
DescripciónCMOS, Single +5 V Supply, Low Power, 12-Bit Sampling ADC
Páginas / Página17 / 7 — AD7880. CLOCK INPUT. 2.5. OUTPUT. CODE. 2.0. 111...111. 111...110. …
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AD7880. CLOCK INPUT. 2.5. OUTPUT. CODE. 2.0. 111...111. 111...110. 111...101. 1.5. 111...100. 1.0. NORMALIZED LINEARITY ERROR. 0.5. 000...011

AD7880 CLOCK INPUT 2.5 OUTPUT CODE 2.0 111...111 111...110 111...101 1.5 111...100 1.0 NORMALIZED LINEARITY ERROR 0.5 000...011

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AD7880
The AD7880 has two unipolar input ranges, 0 V to 5 V and 0 V
CLOCK INPUT
to 10 V. Figure 5 shows the analog input for the 0 V to 5 V The AD7880 is specified to operate with a 2.5 MHz clock con- range. The designed code transitions occur midway between nected to the CLKIN input pin. This pin may be driven directly successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, by CMOS or TTL buffers. The mark/space ratio on the clock 5/2 LSBs . FS –3/2 LSBs). The output code is straight binary can vary from 40/60 to 60/40. As the clock frequency is slowed with 1 LSB = FS/4096 = 5 V/4096 = 1.22 mV. The same applies down, it can result in slightly degraded accuracy performance. for the 0 V to 10 V range, as shown in Figure 6, except that the This is due to leakage effects on the hold capacitor in the inter- LSB size is bigger. In this case 1 LSB = FS/4096 = 10 V/4096 = nal track-and-hold amplifier. Figure 10 is a typical plot of accu- 2.44 mV. The ideal input/output transfer characteristic for both racy versus clock frequency for the ADC. these unipolar ranges is shown in Figure 8.
2.5 OUTPUT CODE 2.0 111...111
A A
111...110
A
111...101
A
1.5 111...100
A A
1.0
A A A
NORMALIZED LINEARITY ERROR 0.5 000...011
A
FS 1LSB = 4096 000...010
A A
0.0 0.5 1.5 2.5 3.5 000...001
A
CLOCK FREQUENCY – MHz 000...000 1LSB +
A
0V FS – 1LSB
Figure 10. Normalized Linearity Error vs. Clock Frequency
V INPUT VOLTAGE IN TRACK/HOLD AMPLIFIER
Figure 8. AD7880 Unipolar Transfer Characteristic The charge balanced comparator used in the AD7880 for the Figure 7 shows the AD7880’s ± 5 V bipolar analog input con- A/D conversion provides the user with an inherent track/hold figuration. Once again the designed code transitions occur mid- function. The track/hold amplifier acquires an input signal to way between successive integer LSB values. The output code is 12-bit accuracy in less than 3 µs. The overall throughput time is straight binary with 1 LSB = FS/4096 = 10 V/4096 = 2.44 mV. equal to the conversion time plus the track/hold amplifier acqui- The ideal bipolar input/output transfer characteristic is shown in sition time. For a 2.5 MHz input clock, the throughput time is Figure 9. 15 µs.
OUTPUT
The operation of the track/hold amplifier is essentially transpar-
CODE
ent to the user. The track/hold amplifier goes from its tracking mode to its hold mode at the start of conversion, i.e., on the ris- ing edge of CONVST as shown in Figure 1.
111...111
A
111...110
A A
OFFSET AND FULL-SCALE ADJUSTMENT
In most Digital Signal Processing (DSP) applications, offset and A full-scale errors have little or no effect on system performance. A Offset error can always be eliminated in the analog domain by
100...101 – FS 2 1LSB
A ac coupling. Full-scale error effect is linear and does not cause
100...000
A problems as long as the input signal is within the full dynamic
+1LSB + FS
A
011...111
A
– 1LSB 2
range of the ADC. Some applications will require that the input A signal range match the maximum possible dynamic range of the ADC. In such applications, offset and full-scale error will have
011...110
A
FS = 10V
A to be adjusted to zero.
1LSB = FS 000...001
A
4096
The following sections describe suggested offset and full-scale
000...000
A adjustment techniques which rely on adjusting the inherent off- set of the op amp driving the input to the ADC as well as tweak- ing an additional external potentiometer as shown in Figure 11.
0V V INPUT VOLTAGE IN
Figure 9. AD7880 Bipolar Transfer Characteristic –6– REV. 0