Datasheet AD7891 (Analog Devices) - 7

AD7891 PIN FUNCTION DESCRIPTIONS PLCC MQFP Pin No. Pin No. Mnemonic Description
1–5 28–43 VINXA, VINXB Analog Input Channels. The AD7891 contains eight pairs of analog input channels. Each 34–44 channel contains two input pins to allow a number of different input ranges to be used with the AD7891. There are two possible input voltage ranges on the AD7891-1. The ±5 V input range is selected by connecting the input voltage to both VINXA and VINXB, while the ± 10 V input range is selected by applying the input voltage to VINXA and con- necting VINXB to AGND. The AD7891-2 has three possible input ranges. The 0 V to 2.5 V input range is selected by connecting the analog input voltage to both VINXA and VINXB; the 0 V to 5 V input range is selected by applying the input voltage to VINXA and connecting VINXB to AGND while the ± 2.5 V input range is selected by connecting the analog input voltage to VINXA and connecting VINXB to REF IN (provided this REF IN voltage comes from a low impedance source). The channel to be converted is selected by the A2, A1, and A0 bits of the control register. In the parallel interface mode, these bits are available as three data input lines (DB3 to DB5) in a parallel write operation. While in the serial inter- face mode, these three bits are accessed via the DATA IN line in a serial write operation. The multiplexer has guaranteed break-before-make operation. 10, 19 4, 13 VDD Positive Supply Voltage, 5 V ± 5%. 11, 33 5, 27 AGND Analog Ground. Ground reference for track/hold, comparator, and DAC. 20 14 DGND Digital Ground. Ground reference for digital circuitry. 6 44 STANDBY Standby Mode Input. TTL compatible input used to put the device into the power save or standby mode. The STANDBY input is high for normal operation and low for standby operation. 9 3 REF OUT/REF IN Voltage Reference Output/Input. The part can either be used with its own internal refer- ence or with an external reference source. The on-chip 2.5 V reference voltage is pro- vided at this pin. When using this internal reference as the reference source for the part, REF OUT should be decoupled to REF GND with a 0.1 mF disc ceramic capaci- tor. The output impedance of the reference source is typically 2 kW. When using an external reference source as the reference voltage for the part, the reference source should be connected to this pin. This overdrives the internal reference and provides the reference source for the part. The reference pin is buffered on-chip but must be able to sink or source current through this 2 kW resistor to the output of the on-chip reference. The nominal reference voltage for correct operation of the AD7891 is 2.5 V. 7 1 REF GND Reference Ground. Ground reference for the part’s on-chip reference buffer. The REF OUT pin of the part should be decoupled with a 0.1 mF capacitor to this REF GND pin. If the AD7891 is used with an external reference, the external reference should also be decoupled to this pin. The REF GND pin should be connected to the AGND pin or the system’s AGND plane. 30 24 CONVST Convert Start. Edge-triggered logic input. A low-to-high transition on this input puts the track/hold into hold and initiates conversion. When changing channels on the part, sufficient time should be given for multiplexer settling and track/hold acquisition between the channel change and the rising edge of CONVST. 32 26 EOC End-of-Conversion. Active low logic output indicating converter status. The end of con- version is signified by a low-going pulse on this line. The duration of this EOC pulse is nominally 80 ns. 12 6 MODE Interface Mode. Control input that determines the interface mode for the part. With this pin at a logic low, the AD7891 is in its serial interface mode; with this pin at a logic high, the device is in its parallel interface mode. –6– REV. D Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS TIMING CHARACTERISTICS ORDERING GUIDE PIN CONFIGURATIONS PIN FUNCTION DESCRIPTIONS PARALLEL INTERFACE MODE FUNCTIONS Data I/O Lines Parallel Read Operation SERIAL INTERFACE MODE FUNCTIONS CONTROL REGISTER TERMINOLOGY Signal-to-(Noise + Distortion) Ratio Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise Intermodulation Distortion Channel-to-Channel Isolation Relative Accuracy Differential Nonlinearity Positive Full-Scale Error (AD7891-1, ±10 V and ±5 V; AD7891-2, ±2.5 V) Positive Full-Scale Error (AD7891-2, 0 V to 5 V and 0 V to 2.5 V) Bipolar Zero Error (AD7891-1, ±10 V and ±5 V; AD7891-2, ±2.5 V) Unipolar Offset Error (AD7891-2, 0 V to 5 V and 0 V to 2.5 V) Negative Full-Scale Error (AD7891-1, ±10 V and ±5V; AD7891-2, ±2.5 V) Track/Hold Acquisition Time CONVERTER DETAILS INTERFACE INFORMATION Parallel Interface Mode Serial Interface Mode Simplifying the Serial Interface CIRCUIT DESCRIPTION Reference Analog Input Section Track/Hold Amplifier STANDBY Operation MICROPROCESSOR INTERFACING AD7891 to 8X51 Serial Interface AD7891 to 68HC11 Serial Interface AD7891 to ADSP-21xx Serial Interface AD7891 to DSP5600x Serial Interface AD7891 to TMS320xxx Serial Interface PARALLEL INTERFACING AD7891 to ADSP-21xx AD7891 to TMS32020, TMS320C25, and TMS320C5x AD7891 to TMS320C3x AD7891 to DSP5600x Power Supply Bypassing and Grounding AD7891 PERFORMANCE Linearity Noise Dynamic Performance Effective Number of Bits OUTLINE DIMENSIONS Revision History