Datasheet AD7851 (Analog Devices)

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14-Bit 333 kSPS Serial A/D Converter AD7851 FUNCTIONAL BLOCK DIAGRAM FEATURES Single 5 V Supply AVDD AGND AGND 333 kSPS Throughput Rate/
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2 LSB DNL—A Grade 285 kSPS Throughput Rate/
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1 LSB DNL—K Grade AIN (+) DVDD T/H A and K Grades Guaranteed to 125
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C/238 kSPS AIN (–) AD7851 DGND Throughput Rate 4.096V Pseudo-Differential Input with Two Input Ranges REFERENCE System and Self-Calibration with Autocalibration on Power-Up REFIN/ BUF COMP REFOUT Read/Write Capability of Calibration Data AMODE Low Power: 60 mW Typ Power-Down Mode: 5
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W Typ Power Consumption Flexible Serial Interface: 8051/SPI®/QSPI™/
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P Compatible C CHARGE CLKIN REF1 REDISTRIBUTION 24-Lead PDIP, SOIC, and SSOP Packages CONVST DAC SAR + ADC C CONTROL REF2 BUSY APPLICATIONS SLEEP Digital Signal Processing CALIBRATION CAL Speech Recognition and Synthesis MEMORY AND CONTROLLER Spectrum Analysis DSP Servo Control Instrumentation and Control Systems SERIAL INTERFACE/CONTROL REGISTER High Speed Modems Automotive SM1 SM2 SYNC DIN DOUT SCLK POLARITY GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD7851 is a high speed, 14-bit ADC that operates from a 1. Single 5 V supply. single 5 V power supply. The ADC powers up with a set of default 2. Operates with reference voltages from 4 V to VDD. conditions at which time it can be operated as a read-only ADC. 3. Analog input ranges from 0 V to VDD. The ADC contains self-calibration and system calibration options 4. System and self-calibration including power-down mode. to ensure accurate operation over time and temperature and has a number of power-down options for low power applications. 5. Versatile serial I/O port. The AD7851 is capable of a 333 kHz throughput rate. The input track-and-hold acquires a signal in 0.33 µs and features a pseudo-differential sampling scheme. The AD7851 has the added advantage of two input voltage ranges (0 V to VREF and –VREF/2 to +VREF/2 centered about VREF/2). Input signal range is to VDD and the part is capable of converting full power signals to 20 MHz. CMOS construction ensures low power dissipation (60 mW typ) with power-down mode (5 µW typ). The part is available in a 24-lead, 0.3 inch-wide PDIP, a 24-lead SOIC, and a 24-lead SSOP package. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS SPECIFICATIONS TIMING SPECIFICATIONS TYPICAL TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS PINOUT FOR DIP, SOIC, AND SSOP ORDERING GUIDE TERMINOLOGY Integral Nonlinearity Differential Nonlinearity Total Unadjusted Error Unipolar Offset Error Positive Full-Scale Error Negative Full-Scale Error Bipolar Zero Error Track-and-Hold Acquisition Time Signal-to-(Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion Power Supply Rejection Ratio (PSRR) Full Power Bandwidth (FPBW) PIN FUNCTION DESCRIPTIONS AD7851 ON-CHIP REGISTERS Addressing the On-Chip Registers Writing Reading CONTROL REGISTER STATUS REGISTER CALIBRATION REGISTERS Addressing the Calibration Registers Writing to/Reading from the Calibration Registers Adjusting the Offset Calibration Register Adjusting the Gain Calibration Register CIRCUIT INFORMATION CONVERTER DETAILS TYPICAL CONNECTION DIAGRAM ANALOG INPUT Acquisition Time DC/AC Applications Input Ranges Transfer Functions REFERENCE SECTION AD7851 PERFORMANCE CURVES POWER-DOWN OPTIONS POWER-UP TIMES Using an External Reference Using the Internal (On-Chip) Reference POWER VS. THROUGHPUT RATE CALIBRATION SECTION Calibration Overview Automatic Calibration on Power-On Self-Calibration Description Self-Calibration Timing System Calibration Description System Gain and Offset Interaction System Calibration Timing SERIAL INTERFACE SUMMARY Resetting the Serial Interface DETAILED TIMING SECTION Mode 1 (2-Wire 8051 Interface) Mode 2 (3-Wire SPI/QSPI Interface Mode) Mode 3 (QSPI Interface Mode) MODE 4 and 5 (Self-Clocking Modes) CONFIGURING THE AD7851 AD7851 as a Read-Only ADC Writing to the AD7851 Interface Modes 2 and 3 Configuration Interface Mode 1 Configuration Interface Modes 4 and 5 Configuration MICROPROCESSOR INTERFACING AD7851 to 8XC51/PIC17C42 Interface AD7851 to 68HC11/16/L11/PIC16C42 Interface AD7851 to ADSP-21xx Interface AD7851 to DSP56000/1/2/L002 Interface AD7851 to TMS320C20/25/5x/LC5x Interface APPLICATION HINTS Grounding and Layout Evaluating the AD7851 Performance AD785x Family OUTLINE DIMENSIONS Revision History