Datasheet AD7863 (Analog Devices) - 10

FabricanteAnalog Devices
DescripciónSimultaneous Sampling Dual 175 kSPS 14-Bit A/D Converter
Páginas / Página25 / 10 — AD7863. CONVERTER DETAILS. REFERENCE SECTION. TRACK-AND-HOLD SECTION
RevisiónB
Formato / tamaño de archivoPDF / 458 Kb
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AD7863. CONVERTER DETAILS. REFERENCE SECTION. TRACK-AND-HOLD SECTION

AD7863 CONVERTER DETAILS REFERENCE SECTION TRACK-AND-HOLD SECTION

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AD7863 CONVERTER DETAILS
The AD7863 is a high speed, low power, dual 14-bit analog-to- The track-and-hold amplifiers acquire input signals to 14-bit digital converter that operates from a single 5 V supply. The accuracy in less than 500 ns. The operation of the track-and- part contains two 5.2 μs successive approximation ADCs, two holds is essentially transparent to the user. The two track-and-hold track-and-hold amplifiers, an internal 2.5 V reference, and a amplifiers sample their respective input channels simultaneously, high speed parallel interface. Four analog inputs are grouped on the falling edge of CONVST. The aperture time for the into two channels (A and B) selected by the A0 input. Each track-and-holds (that is, the delay time between the external channel has two inputs (VA1 and VA2 or VB1 and VB2) that can be CONVST signal and the track-and-hold actually going into sampled and converted simultaneously, thus preserving the hold) is well-matched across the two track-and-holds on one relative phase information of the signals on both analog inputs. device and also well-matched from device to device. This allows The part accepts an analog input range of ±10 V (AD7863-10), the relative phase information between different input channels ±2.5 V (AD7863-3), and 0 V to 2.5 V (AD7863-2). Overvoltage to be accurately preserved. It also allows multiple AD7863s to protection on the analog inputs for the part allows the input simultaneously sample more than two channels. At the end of voltage to go to ±17 V, ±7 V, or +7 V, respectively, without conversion, the part returns to its tracking mode. The acquisition causing damage. The AD7863 has two operating modes, the high time of the track-and-hold amplifiers begins at this point. sampling mode and the auto sleep mode, where the part auto- matically goes into sleep after the end of conversion. These modes
REFERENCE SECTION
are discussed in more detail in the Timing and Control section. The AD7863 contains a single reference pin, labeled VREF, that provides access to the part’s own 2.5 V reference. Alternatively, Conversion is initiated on the AD7863 by pulsing the CONVST an external 2.5 V reference can be connected to this pin, thus input. On the falling edge of CONVST, both on-chip track-and- providing the reference source for the part. The part is specified holds are simultaneously placed into hold and the conversion with a 2.5 V reference voltage. Errors in the reference source sequence is started on both channels. The conversion clock for result in gain errors in the AD7863 transfer function and add to the part is generated internally using a laser-trimmed clock the specified full-scale errors on the part. On the AD7863-10 oscillator circuit. The BUSY signal indicates the end of and AD7863-3, it also results in an offset error injected in the conversion and at this time the conversion results for both attenuator stage. channels are available to be read. The first read after a conver- sion accesses the result from VA1 or VB1, and the second read The AD7863 contains an on-chip 2.5 V reference. To use this accesses the result from VA2 or VB2, depending on whether the reference as the reference source for the AD7863, connect two multiplexer select A0 is low or high, respectively, before the 0.1 μF disc ceramic capacitors from the VREF pin to AGND. The conversion is initiated. Data is read from the part via a 14-bit voltage that appears at this pin is internally buffered before parallel data bus with standard CS and RD signals. being applied to the ADC. If this reference is required for use external to the AD7863, it should be buffered because the part Conversion time for the AD7863 is 5.2 μs in the high sampling has a FET switch in series with the reference output resulting in mode (10 μs for the auto sleep mode), and the track/hold a source impedance for this output of 5.5 kΩ nominal. The acquisition time is 0.5 μs. To obtain optimum performance tolerance on the internal reference is ±10 mV at 25°C with a from the part, the read operation should not occur during the typical temperature coefficient of 25 ppm/°C and a maximum conversion or during the 400 ns prior to the next conversion. error over temperature of ±25 mV. This allows the part to operate at throughput rates up to 175 kHz and achieve data sheet specifications. If the application requires a reference with a tighter tolerance or the AD7863 needs to be used with a system reference, the user
TRACK-AND-HOLD SECTION
has the option of connecting an external reference to this VREF The track-and-hold amplifiers on the AD7863 allow the ADCs pin. The external reference effectively overdrives the internal to accurately convert an input sine wave of full-scale amplitude reference and thus provides the reference source for the ADC. to 14-bit accuracy. The input bandwidth of the track-and-hold The reference input is buffered before being applied to the ADC is greater than the Nyquist rate of the ADC, even when the with a maximum input current of ±100 μA. A suitable reference ADC is operated at its maximum throughput rate of 175 kHz source for the AD7863 is the AD780 precision 2.5 V reference. (that is, the track-and hold can handle input frequencies in excess of 87.5 kHz). Rev. B | Page 9 of 24 Document Outline FEATURES GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY CONVERTER DETAILS TRACK-AND-HOLD SECTION REFERENCE SECTION CIRCUIT DESCRIPTION ANALOG INPUT SECTION OFFSET AND FULL-SCALE ADJUSTMENT Positive Full-Scale Adjust (−10 Version) Negative Full-Scale Adjust (−10 Version) TIMING AND CONTROL Read Options OPERATING MODES MODE 1 OPERATION Normal Power, High Sampling Performance MODE 2 OPERATION Power-Down, Auto-Sleep After Conversion AD7863 DYNAMIC SPECIFICATIONS SIGNAL-TO-NOISE RATIO (SNR) EFFECTIVE NUMBER OF BITS TOTAL HARMONIC DISTORTION (THD) INTERMODULATION DISTORTION PEAK HARMONIC OR SPURIOUS NOISE DC LINEARITY PLOT POWER CONSIDERATIONS MICROPROCESSOR INTERFACING AD7863 TO ADSP-2100 INTERFACE AD7863 TO ADSP-2101/ADSP-2102 INTERFACE AD7863 TO TMS32010 INTERFACE AD7863 TO TMS320C25 INTERFACE AD7863 TO MC68000 INTERFACE AD7863 TO 80C196 INTERFACE VECTOR MOTOR CONTROL MULTIPLE AD7863S APPLICATIONS HINTS PC BOARD LAYOUT CONSIDERATIONS GROUND PLANES POWER PLANES SUPPLY DECOUPLING OUTLINE DIMENSIONS ORDERING GUIDE