Datasheet AD7623 (Analog Devices) - 4

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AD7623 SPECIFICATIONS
AVDD = DVDD = 2.5 V; OVDD = 2.3 V to 3.6 V; VREF = 2.5 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 2. Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range VIN+ − VIN− −VREF +VREF V Operating Input Voltage VIN+, VIN− to AGND −0.1 AVDD1 V Analog Input CMRR fIN = 100 kHz 55 dB Input Current 1.33 MSPS throughput 10 μA Input Impedance2 THROUGHPUT SPEED Complete Cycle 750 ns Throughput Rate 0 1.33 MSPS DC ACCURACY Integral Linearity Error3 VREF = 2.048 V, PDREF = high −2 ±1 +2 LSB4 No Missing Codes VREF = 2.048 V, PDREF = high 16 Bits Differential Linearity Error VREF = 2.048 V, PDREF = high −1 +2 LSB Transition Noise VREF = 2.5 V 0.70 LSB Transition Noise VREF = 2.048 V 0.82 LSB Zero Error, T 5 MIN to TMAX −30 +30 LSB Zero Error Temperature Drift ±1 ppm/°C Gain Error, T 5 MIN to TMAX −0.38 +0.38 % of FSR Gain Error Temperature Drift ±2 ppm/°C Power Supply Sensitivity AVDD = 2.5 V ± 5% ±2 LSB AC ACCURACY Dynamic Range fIN = 20 kHz 90 dB6 Signal-to-Noise fIN = 20 kHz 88 89.5 dB fIN = 20 kHz, VREF = 2.048 V 86 88 dB fIN = 100 kHz 89 dB Spurious-Free Dynamic Range fIN = 20 kHz 97 dB fIN = 100 kHz 96 dB Total Harmonic Distortion fIN = 20 kHz –97 dB fIN = 100 kHz −95 dB Signal-to-(Noise + Distortion) fIN = 20 kHz 87.5 88.5 dB fIN = 20 kHz, VREF = 2.048 V 87.5 dB fIN = 100 kHz 88 dB –3 dB Input Bandwidth 50 MHz SAMPLING DYNAMICS Aperture Delay 1 ns Aperture Jitter 5 ps rms Transient Response Full-scale step 50 ns INTERNAL REFERENCE PDREF = PDBUF = low Output Voltage REF @ 25°C 2.038 2.048 2.058 V Temperature Drift –40°C to +85°C ±7 ppm/°C Line Regulation AVDD = 2.5 V ± 5% ±15 ppm/V Turn-On Settling Time CREF = 10 μF 5 ms REFBUFIN Output Voltage REFBUFIN @ 25°C 1.2 V REFBUFIN Output Resistance 6.33 kΩ Rev. 0 | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS SERIAL CLOCK TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE Single-to-Differential Driver VOLTAGE REFERENCE INPUT Internal Reference (PDBUF = Low, PDREF = Low) External 1.2 V Reference and Internal Buffer (PDREF = High, PBBUF = Low) External Reference (PDBUF = High, PRBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLY Power Sequencing Power-Up POWER DISSIPATION VS. THROUGHPUT CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Previous Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION LAYOUT EVALUATING THE AD7623 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE