Datasheet AD7763 (Analog Devices) - 2

AD7763* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS REFERENCE MATERIALS
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Technical Articles
• MS-2210: Designing Power Supplies for High Speed ADC
EVALUATION KITS
• Vibration Analysis Using ADCs Keeps Industrial • AD7763 Evaluation Kit Equipment Working
DOCUMENTATION DESIGN RESOURCES Application Notes
• AD7763 Material Declaration • AN-280: Mixed Signal Circuit Technologies • PCN-PDN Information • AN-282: Fundamentals of Sampled Data Systems • Quality And Reliability • AN-283: Sigma-Delta ADCs and DACs • Symbols and Footprints • AN-311: How to Reliably Protect CMOS Circuits Against Power Supply Overvoltaging
DISCUSSIONS
• AN-342: Analog Signal-Handling for High Speed and View all AD7763 EngineerZone Discussions. Accuracy • AN-388: Using Sigma-Delta Converters-Part 1
SAMPLE AND BUY
• AN-389: Using Sigma-Delta Converters-Part 2 Visit the product page to see pricing options.
Data Sheet
• AD7763: 24-Bit, 625 kSPS, 109 dB Sigma-Delta ADC with
TECHNICAL SUPPORT
On Chip Buffers, Serial Interface Data Sheet Submit a technical question or find your regional support number.
SOFTWARE AND SYSTEMS REQUIREMENTS
• CED1Z FPGA Project for AD7763 with Nios driver
DOCUMENT FEEDBACK
• EVAL-AD7763EDZ - AD7763 Evaluation Board - Software Submit feedback for this data sheet.
TOOLS AND SIMULATIONS
• Sigma-Delta ADC Tutorial
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Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide