Datasheet AD7656-1, AD7657-1, AD7658-1 (Analog Devices) - 3

FabricanteAnalog Devices
Descripción250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar 12-Bit ADC
Páginas / Página32 / 3 — Data Sheet. AD7656-1/AD7657-1/AD7658-1. SPECIFICATIONS AD7656-1. Table 1. …
RevisiónD
Formato / tamaño de archivoPDF / 726 Kb
Idioma del documentoInglés

Data Sheet. AD7656-1/AD7657-1/AD7658-1. SPECIFICATIONS AD7656-1. Table 1. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments

Data Sheet AD7656-1/AD7657-1/AD7658-1 SPECIFICATIONS AD7656-1 Table 1 Parameter Min Typ Max Unit Test Conditions/Comments

Línea de modelo para esta hoja de datos

Versión de texto del documento

link to page 20 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4
Data Sheet AD7656-1/AD7657-1/AD7658-1 SPECIFICATIONS AD7656-1
VREF = 2.5 V internal/external, AVCC = 4.75 V to 5.25 V, DVCC = 4.75 V to 5.25 V, VDRIVE = 2.7 V to 5.25 V; for the ±4 × VREF range, VDD = 10 V to 16.5 V, VSS = −10 V to −16.5 V; for the ±2 × VREF range, VDD = 5 V to 16.5 V, VSS = −5 V to −16.5 V; fSAMPLE = 250 kSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 10 kHz sine wave Signal-to-(Noise + Distortion) (SINAD)1 88 dB Signal-to-Noise Ratio (SNR)1 88 dB Total Harmonic Distortion (THD)1 −90 dB −105 dB VDD/VSS = ±5 V to ±16.5 V Peak Harmonic or Spurious Noise (SFDR)1 −100 dB Intermodulation Distortion (IMD)1 fa = 10.5 kHz, fb = 9.5 kHz Second-Order Terms −112 dB Third-Order Terms −107 dB Aperture Delay 10 ns Aperture Delay Matching 4 ns Aperture Jitter 35 ps Channel-to-Channel Isolation1 −100 dB fIN on unselected channels up to 100 kHz Full-Power Bandwidth 4.5 MHz @ −3 dB 2.2 MHz @ −0.1 dB DC ACCURACY Resolution 16 Bits No Missing Codes B Version 15 Bits Y Version 14 Bits Integral Nonlinearity1 ±3 LSB ±1 LSB Positive Full-Scale Error1 ±0.8 % FSR ±0.381% FSR typical Positive Full-Scale Error Matching1 ±0.35 % FSR Bipolar Zero-Scale Error1 ±0.0137% FSR typical B Version ±0.048 % FSR Y Version ±0.048 %F SR Bipolar Zero-Scale Error Matching1 ±0.038 % FSR Negative Full-Scale Error1 ±0.8 % FSR ±0.381% FSR typical Negative Full-Scale Error Matching1 ±0.35 % FSR ANALOG INPUT See Table 8 for minimum VDD/VSS for each range Input Voltage Ranges −4 × VREF +4 × VREF V RNGx bits or RANGE pin = 0 −2 × VREF +2 × VREF V RNGx bits or RANGE pin = 1 DC Leakage Current ±1 µA Input Capacitance2 10 pF ±4 × VREF range when in track 14 pF ±2 × VREF range when in track REFERENCE INPUT/OUTPUT Reference Input Voltage Range 2.5 2.5 V DC Leakage Current ±1 µA Input Capacitance2 18.5 pF REFEN/DIS = 1 Reference Output Voltage 2.49 2.51 V Long-Term Stability 150 ppm 1000 hours Reference Temperature Coefficient 25 ppm/°C 6 ppm/°C Rev. D | Page 3 of 32 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications AD7656-1 AD7657-1 AD7658-1 Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Converter Details Track-and-Hold Amplifiers Analog Input ADC Transfer Function Internal/External Reference Typical Connection Diagram Driving the Analog Inputs Interface Options Parallel Interface (SER/PAR SEL = 0) Software Selection of ADCs Changing the Analog Input Range (H/S SEL = 0) Changing the Analog Input Range (H/S SEL = 1) Serial Interface (SER/PAR SEL = 1) Serial Read Operation Daisy-Chain Mode (DCEN = 1, SER/ SEL = 1) Standby/Partial Power-Down Modes of Operation (SER/PAR SEL = 0 or 1) Application Hints Layout Power Supply Configuration Outline Dimensions Ordering Guide