Datasheet AD7656-1, AD7657-1, AD7658-1 (Analog Devices)

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250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar, 16-/14-/12-Bit ADC Data Sheet AD7656-1 /AD7657-1/ AD7658-1 FEATURES FUNCTIONAL BLOCK DIAGRAM Pin and software compatible with AD7656/AD7657/AD7658 VDD CONVST A CONVST B CONVST C AVCC DVCC featuring reduced decoupling requirements 6 independent ADCs CS CLK True bipolar analog inputs REF CONTROL OSC SER/PAR SEL LOGIC VDRIVE Pin-/software-selectable ranges: ±10 V, ±5 V STBY Fast throughput rate: 250 kSPS BUF OUTPUT i CMOS process technology 16-/14-/ DB8/DOUT A DRIVERS V1 T/H 12-BIT SAR Low power DB6/SCLK 140 mW at 250 kSPS with 5 V supplies 16-/14-/ V2 T/H 12-BIT SAR High noise performance with wide bandwidth OUTPUT BUF DB9/DOUT B 88 dB SNR at 10 kHz input frequency DRIVERS 16-/14-/ On-chip reference and reference buffers V3 T/H 12-BIT SAR OUTPUT DRIVERS DB10/DOUT C High speed parallel, serial, and daisy-chain interface modes High speed serial interface V4 T/H 16-/14-/ 12-BIT SAR DATA/ OUTPUT SPI/QSPI™/MICROWIRE™/DSP compatible CONTROL DRIVERS BUF LINES Standby mode: 315 µW maximum V5 T/H 16-/14-/ 12-BIT SAR RD 64-lead LQFP WR/REFEN/DIS APPLICATIONS V6 T/H 16-/14-/ 12-BIT SAR Power line monitoring and measuring systems
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AD7656-1/AD7657-1/AD7658-1 Instrumentation and control systems
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VSS AGND DGND Multiaxis positioning systems
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GENERAL DESCRIPTION
The AD7656-1/AD7657-1/AD7658-11 are reduced decoupling pin- The conversion process and data acquisition are controlled and software-compatible versions of AD7656/AD7657/AD7658. using the CONVST signals and an internal oscillator. Three The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ CONVST pins (CONVST A, CONVST B, and CONVST C) 14-/12-bit, fast, low power successive approximation ADCs in allow independent, simultaneous sampling of the three ADC a package designed on the iCMOS® process (industrial CMOS). pairs. The AD7656-1/AD7657-1/AD7658-1 have a high speed iCMOS is a process combining high voltage silicon with submicron parallel and serial interface, allowing the devices to interface with CMOS and complementary bipolar technologies. It enables the microprocessors or DSPs. When the serial interface is selected, development of a wide range of high performance analog ICs each part has a daisy-chain feature that allows multiple ADCs to capable of 33 V operation in a footprint that no previous generation connect to a single serial interface. The AD7656-1/AD7657-1/ of high voltage parts could achieve. Unlike analog ICs using conven- AD7658-1 can accommodate true bipolar input signals in the tional CMOS processes, iCMOS components can accept bipolar ±4 × VREF and ±2 × VREF ranges. Each AD7656-1/AD7657-1/ input signals while providing increased performance, which AD7658-1 also contains an on-chip 2.5 V reference. dramatically reduces power consumption and package size.
PRODUCT HIGHLIGHTS
The AD7656-1/AD7657-1/AD7658-1 feature throughput rates 1. Six 16-/14-/12-bit, 250 kSPS ADCs on board. of up to 250 kSPS. The parts contain low noise, wide bandwidth 2. Six true bipolar, high impedance analog inputs. track-and-hold amplifiers that can handle input frequencies 3. High speed parallel and serial interfaces. up to 4.5 MHz. 4. Reduced decoupling requirements and reduced bill of materials cost compared with the AD7656/AD7657/ AD7658 devices. 1 Protected by U.S. Patent No. 6,731,232.
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Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications AD7656-1 AD7657-1 AD7658-1 Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Converter Details Track-and-Hold Amplifiers Analog Input ADC Transfer Function Internal/External Reference Typical Connection Diagram Driving the Analog Inputs Interface Options Parallel Interface (SER/PAR SEL = 0) Software Selection of ADCs Changing the Analog Input Range (H/S SEL = 0) Changing the Analog Input Range (H/S SEL = 1) Serial Interface (SER/PAR SEL = 1) Serial Read Operation Daisy-Chain Mode (DCEN = 1, SER/ SEL = 1) Standby/Partial Power-Down Modes of Operation (SER/PAR SEL = 0 or 1) Application Hints Layout Power Supply Configuration Outline Dimensions Ordering Guide