Datasheet AD9258 (Analog Devices) - 2

AD9258* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017 COMPARABLE PARTS TOOLS AND SIMULATIONS
View a parametric search of comparable parts. • Visual Analog • AD9258 IBIS Models
EVALUATION KITS
• AD9258 Evaluation Board
REFERENCE DESIGNS
• CN0140
DOCUMENTATION Application Notes REFERENCE MATERIALS
• AN-1142: Techniques for High Speed ADC PCB Layout
Technical Articles
• AN-586: LVDS Outputs for High Speed A/D Converters • Improve The Design Of Your Passive Wideband ADC • AN-742: Frequency Domain Response of Switched- Front-End Network Capacitor ADCs • MS-2210: Designing Power Supplies for High Speed ADC • AN-807: Multicarrier WCDMA Feasibility • AN-808: Multicarrier CDMA2000 Feasibility
DESIGN RESOURCES
• AN-812: MicroController-Based Serial Port Interface (SPI) • AD9258 Material Declaration Boot Circuit • PCN-PDN Information • AN-827: A Resonant Approach to Interfacing Amplifiers to • Quality And Reliability Switched-Capacitor ADCs • Symbols and Footprints • AN-878: High Speed ADC SPI Control Software • AN-905: Visual Analog Converter Evaluation Tool Version
DISCUSSIONS
1.0 User Manual View all AD9258 EngineerZone Discussions. • AN-935: Designing an ADC Transformer-Coupled Front End
SAMPLE AND BUY Data Sheet
Visit the product page to see pricing options. • AD9258: 14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) Data Sheet
TECHNICAL SUPPORT User Guides
• UG-003: Evaluating the AD9650/AD9268/AD9258/ Submit a technical question or find your regional support AD9251/AD9231/AD9204 Analog-to-Digital Converters number.
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ADC DC SPECIFICATIONS ADC AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Input Common Mode Common-Mode Voltage Servo Dither Large-Signal FFT Small-Signal FFT Static Linearity Differential Input Configurations VOLTAGE REFERENCE Internal Reference Connection External Reference Operation CLOCK INPUT CONSIDERATIONS Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations CHANNEL/CHIP SYNCHRONIZATION POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS Digital Output Enable Function (OEB) TIMING Data Clock Output (DCO) BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST BUILT-IN SELF-TEST (BIST) OUTPUT TEST MODES SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Open Locations Default Values Logic Levels Transfer Register Map Channel-Specific Registers MEMORY MAP REGISTER TABLE MEMORY MAP REGISTER DESCRIPTIONS Sync Control (Register 0x100) Bits[7:3]—Reserved Bit 2—Clock Divider Next Sync Only Bit 1—Clock Divider Sync Enable Bit 0—Master Sync Enable APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations LVDS Operation Exposed Paddle Thermal Heat Slug Recommendations VCM RBIAS Reference Decoupling SPI Port OUTLINE DIMENSIONS ORDERING GUIDE