Datasheet AD7195 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation |
| Páginas / Página | 45 / 3 — AD7195. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 7/2017—Rev. A to … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 1.0 Mb |
| Idioma del documento | Inglés |
AD7195. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 7/2017—Rev. A to Rev. B. 1/2010—Revision 0: Initial Version
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AD7195 Data Sheet TABLE OF CONTENTS
Features .. 1 Overview ... 25 Interface ... 1 Analog Input Channel ... 26 Applications ... 1 PGA .. 26 General Description ... 1 Reference ... 26 Functional Block Diagram .. 1 Reference Detect ... 26 Revision History ... 2 Bipolar/Unipolar Configuration .. 27 Specifications ... 3 Data Output Coding .. 27 Timing Characteristics .. 6 Burnout Currents ... 27 Absolute Maximum Ratings .. 8 AC Excitation .. 27 Thermal Resistance .. 8 Channel Sequencer .. 28 ESD Caution .. 8 Digital Interface .. 28 Pin Configuration and Function Descriptions ... 9 Reset ... 32 Typical Performance Characteristics ... 11 System Synchronization .. 32 RMS Noise and Resolution.. 13 Clock .. 32 Sinc4 Chop Disabled ... 13 Enable Parity ... 32 Sinc3 Chop Disabled ... 14 Temperature Sensor ... 32 Sinc4 Chop Enabled .. 15 Bridge Power-Down Switch .. 33 Sinc3 Chop Enabled .. 16 Calibration... 33 On-Chip Registers .. 17 Digital Filter .. 34 Communications Register ... 18 Sinc4 Filter (Chop Disabled) ... 34 Status Register ... 19 Sinc3 Filter (Chop Disabled) ... 36 Mode Register ... 19 Chop Enabled (Sinc4 Filter) .. 38 Configuration Register .. 21 Chop Enabled (Sinc3 Filter) .. 40 Data Register ... 23 Summary of Filter Options ... 41 ID Register ... 23 Grounding and Layout .. 42 GPOCON Register ... 23 Applications Information .. 43 Offset Register ... 24 Weigh Scales .. 43 Ful -Scale Register .. 24 Outline Dimensions ... 44 ADC Circuit Information .. 25 Ordering Guide .. 44
REVISION HISTORY 7/2017—Rev. A to Rev. B
Changed CP-32-11 to CP-32-12 .. Throughout Changes to Table 5 .. 10 Updated Outline Dimensions ... 44 Changes to Ordering Guide .. 44
1/2010—Revision 0: Initial Version
Rev. A | Page 2 of 44 Document Outline FEATURES INTERFACE APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED SINC4 CHOP ENABLED SINC3 CHOP ENABLED ON-CHIP REGISTERS COMMUNICATIONS REGISTER STATUS REGISTER MODE REGISTER CONFIGURATION REGISTER DATA REGISTER ID REGISTER GPOCON REGISTER OFFSET REGISTER FULL-SCALE REGISTER ADC CIRCUIT INFORMATION OVERVIEW Analog Inputs Multiplexer PGA Reference Detect Burnout Currents Σ-Δ ADC and Filter AC Excitation Serial Interface Clock Temperature Sensor Calibration ANALOG INPUT CHANNEL PGA REFERENCE REFERENCE DETECT BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS AC EXCITATION CHANNEL SEQUENCER Single Conversion Mode Continuous Conversion Mode Continuous Read RESET SYSTEM SYNCHRONIZATION CLOCK ENABLE PARITY TEMPERATURE SENSOR BRIDGE POWER-DOWN SWITCH CALIBRATION DIGITAL FILTER SINC4 FILTER (CHOP DISABLED) Sinc4 Output Data Rate/Settling Time Sinc4 Zero Latency Sinc4 50 Hz/60 Hz Rejection SINC3 FILTER (CHOP DISABLED) Sinc3 Output Data Rate and Settling Time Sinc3 Zero Latency Sinc3 50 Hz/60 Hz Rejection CHOP ENABLED (SINC4 FILTER) Output Data Rate and Settling Time (Sinc4 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc4 Chop Enabled) CHOP ENABLED (SINC3 FILTER) Output Data Rate and Settling Time (Sinc3 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc3 Chop Enabled) SUMMARY OF FILTER OPTIONS GROUNDING AND LAYOUT APPLICATIONS INFORMATION WEIGH SCALES OUTLINE DIMENSIONS ORDERING GUIDE
AD7195 Data Sheet TABLE OF CONTENTS
Features .. 1 Overview ... 25 Interface ... 1 Analog Input Channel ... 26 Applications ... 1 PGA .. 26 General Description ... 1 Reference ... 26 Functional Block Diagram .. 1 Reference Detect ... 26 Revision History ... 2 Bipolar/Unipolar Configuration .. 27 Specifications ... 3 Data Output Coding .. 27 Timing Characteristics .. 6 Burnout Currents ... 27 Absolute Maximum Ratings .. 8 AC Excitation .. 27 Thermal Resistance .. 8 Channel Sequencer .. 28 ESD Caution .. 8 Digital Interface .. 28 Pin Configuration and Function Descriptions ... 9 Reset ... 32 Typical Performance Characteristics ... 11 System Synchronization .. 32 RMS Noise and Resolution.. 13 Clock .. 32 Sinc4 Chop Disabled ... 13 Enable Parity ... 32 Sinc3 Chop Disabled ... 14 Temperature Sensor ... 32 Sinc4 Chop Enabled .. 15 Bridge Power-Down Switch .. 33 Sinc3 Chop Enabled .. 16 Calibration... 33 On-Chip Registers .. 17 Digital Filter .. 34 Communications Register ... 18 Sinc4 Filter (Chop Disabled) ... 34 Status Register ... 19 Sinc3 Filter (Chop Disabled) ... 36 Mode Register ... 19 Chop Enabled (Sinc4 Filter) .. 38 Configuration Register .. 21 Chop Enabled (Sinc3 Filter) .. 40 Data Register ... 23 Summary of Filter Options ... 41 ID Register ... 23 Grounding and Layout .. 42 GPOCON Register ... 23 Applications Information .. 43 Offset Register ... 24 Weigh Scales .. 43 Ful -Scale Register .. 24 Outline Dimensions ... 44 ADC Circuit Information .. 25 Ordering Guide .. 44
REVISION HISTORY 7/2017—Rev. A to Rev. B
Changed CP-32-11 to CP-32-12 .. Throughout Changes to Table 5 .. 10 Updated Outline Dimensions ... 44 Changes to Ordering Guide .. 44
1/2010—Revision 0: Initial Version
Rev. A | Page 2 of 44 Document Outline FEATURES INTERFACE APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED SINC4 CHOP ENABLED SINC3 CHOP ENABLED ON-CHIP REGISTERS COMMUNICATIONS REGISTER STATUS REGISTER MODE REGISTER CONFIGURATION REGISTER DATA REGISTER ID REGISTER GPOCON REGISTER OFFSET REGISTER FULL-SCALE REGISTER ADC CIRCUIT INFORMATION OVERVIEW Analog Inputs Multiplexer PGA Reference Detect Burnout Currents Σ-Δ ADC and Filter AC Excitation Serial Interface Clock Temperature Sensor Calibration ANALOG INPUT CHANNEL PGA REFERENCE REFERENCE DETECT BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS AC EXCITATION CHANNEL SEQUENCER Single Conversion Mode Continuous Conversion Mode Continuous Read RESET SYSTEM SYNCHRONIZATION CLOCK ENABLE PARITY TEMPERATURE SENSOR BRIDGE POWER-DOWN SWITCH CALIBRATION DIGITAL FILTER SINC4 FILTER (CHOP DISABLED) Sinc4 Output Data Rate/Settling Time Sinc4 Zero Latency Sinc4 50 Hz/60 Hz Rejection SINC3 FILTER (CHOP DISABLED) Sinc3 Output Data Rate and Settling Time Sinc3 Zero Latency Sinc3 50 Hz/60 Hz Rejection CHOP ENABLED (SINC4 FILTER) Output Data Rate and Settling Time (Sinc4 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc4 Chop Enabled) CHOP ENABLED (SINC3 FILTER) Output Data Rate and Settling Time (Sinc3 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc3 Chop Enabled) SUMMARY OF FILTER OPTIONS GROUNDING AND LAYOUT APPLICATIONS INFORMATION WEIGH SCALES OUTLINE DIMENSIONS ORDERING GUIDE