Datasheet LT3496 (Analog Devices) - 7

FabricanteAnalog Devices
DescripciónTriple Output LED Driver
Páginas / Página20 / 7 — PWM1, PWM2, PWM3:. VREF:. LED1, LED2, LED3:. CTRL1, CTRL2, CTRL3:. CAP1, …
Formato / tamaño de archivoPDF / 346 Kb
Idioma del documentoInglés

PWM1, PWM2, PWM3:. VREF:. LED1, LED2, LED3:. CTRL1, CTRL2, CTRL3:. CAP1, CAP2, CAP3:. SW1, SW2, SW3:. fADJ:. VIN:. VC1, VC2, VC3:. SHDN:

PWM1, PWM2, PWM3: VREF: LED1, LED2, LED3: CTRL1, CTRL2, CTRL3: CAP1, CAP2, CAP3: SW1, SW2, SW3: fADJ: VIN: VC1, VC2, VC3: SHDN:

Línea de modelo para esta hoja de datos

Versión de texto del documento

LT3496 pin Functions
PWM1, PWM2, PWM3:
Pulse Width Modulated Inputs. When the PWM pin is low, the TG pin pulls up to CAP to Signal low turns off the respective converter, reduces turn off the external MOSFET. When the PWM pin is high, quiescent supply current and causes the VC pin for that the external MOSFET turns on. Respective CAP-TG is converter to become high impedance. PWM pin must not limited to 6.5V to protect the MOSFET. Leave open if the be left floating; tie to VREF if not used. external MOSFET is not used.
VREF:
Reference Output Pin. Can supply up to 200µA. The
LED1, LED2, LED3:
Noninverting Inputs of Current Sense nominal Output Voltage is 2V. Error Amplifiers. Connect directly to LED current sense
CTRL1, CTRL2, CTRL3:
LED Current Adjustment Pins. Sets resistor terminal for current sensing of the respective voltage across external sense resistor between CAP and converter LED pins of the respective converter. Setting CTRL voltage
CAP1, CAP2, CAP3:
Inverting Inputs of Current Sense Error to be less than 1V will control the current sense voltage to Amplifiers. Connect directly to other terminal of LED current be one-tenth of CTRL voltage. If CTRL voltage is higher than sense resistor terminal of the respective converter. 1V, the default current sense voltage is 100mV. The CTRL
SW1, SW2, SW3:
Switch Pins. Collector of the internal pin must not be left floating. NPN power switch of the respective converter. Connect
fADJ:
Switching Frequency Adjustment Pin. Setting fADJ to external inductor and anode of external Schottky recti- voltage to be less than 1V will adjust switching frequency fier of the respective converter. Minimize the metal trace up to 2.1MHz. If fADJ voltage is higher than 1V, the default area connected to this pin to minimize electromagnetic switching frequency is 2.1MHz. The fADJ pin must not be interference. left floating.
VIN:
Input Supply Pin. Must be locally bypassed. Powers
VC1, VC2, VC3:
Error Amplifier Compensation Pins. Con- the internal control circuitry. nect a series RC from these pins to GND.
SHDN:
Shutdown Pin. Used to shut down the switching
OVP1, OVP2, OVP3:
Open LED Protection Pins. A voltage regulator and the internal bias circuits for all three convert- higher than 1V on OVP turns off the internal main switch ers. Tie to 1.5V or greater to enable the device. Tie below of the respective converter. Tie to ground if not used. 0.4V to turn off the device.
TG1, TG2, TG3:
The Gate Driver Output Pins for Dis-
Exposed Pad:
Signal Ground and Power Ground. Solder connnect P-Channel MOSFETs. One for each converter. paddle directly to ground plane. 3496ff Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts