Datasheet LT3496 (Analog Devices) - 9

LT3496 applications inForMation
Operation
the PWM1 pin is pulled low, Q1 is turned off. Converter 1 The LT3496 uses a fixed frequency, current mode control stops operating, M1 is turned off, disconnects LED1 and scheme to provide excellent line and load regulation. Op- stops current draw from output capacitor C2. The VC1 eration can be best understood by referring to the Block pin is also disconnected from the internal circuitry and Diagram in Figure 1. The oscillator, ramp generator, refer- draws minimal current from the compensation capacitor ence, internal regulator and UVLO are shared among the CC. The VC1 pin and the output capacitor store the state three converters. The control circuitry, power switch etc., of the LED1 current until PWM1 is pulled up again. This are replicated for each of the three converters. Figure 1 leads to a highly linear relationship between pulse width shows the shared circuits and only converter 1 circuits. and output light, and allows for a large and accurate dim- ming range. A P-channel MOSFET with smaller total gate If the SHDN pin is tied to ground, the LT3496 is shut charge (QG) improves the dimming performance, since down and draws minimal current from VIN. If the SHDN it can be turned on and off faster. Use a MOSFET with a pin exceeds 1.5V, the internal bias circuits turn on. The QG lower than 10nC, and a minimum VTH of –1V to –2V. switching regulators start to operate when their respective Don’t use a Low VTH PMOS. To optimize the PWM control PWM signal goes high. of all the three channels, the rising edge of all the three The main control loop can be understood by following the PWM signals should be synchronized. operation of converter 1. The start of each oscillator cycle In the applications where high dimming ratio is not required, sets the SR latch, A3, and turns on power switch Q1. The M1 can be omitted to reduce cost. In these conditions, signal at the noninverting input (SLOPE node) of the PWM TG1 should be left open. The PWM dimming range can be comparator A2 is proportional to the sum of the switch further increased by using CTRL1 pin to linearly adjust the current and oscillator ramp. When SLOPE exceeds VC1 current sense threshold during the PWM1 high state. (the output of the error amplifier A1), A2 resets the latch and turns off the power switch Q1 through A4 and A5.
Loop Compensation
In this manner, A10 and A2 set the correct peak current Loop compensation determines the stability and transient level to keep the output in regulation. Amplifier A8 has performance. The LT3496 uses current mode control to two noninverting inputs, one from the 1V internal voltage regulate the output, which simplifies loop compensation. reference and the other one from the CTRL1 pin. Whichever To compensate the feedback loop of the LT3496, a series input is lower takes precedence. A8, Q3 and R1 force V1, resistor-capacitor network should be connected from the the voltage across R1, to be one tenth of either 1V or the VC pin to GND. For most applications, the compensation voltage of CTRL1 pin, whichever is lower. VSENSE is the capacitor should be in the range of 100pF to 1nF. The com- voltage across the sensing resistor, RSENSE, which is con- pensation resistor is usually in the range of 5k to 50k. nected in series with the LEDs. VSENSE is compared to V1 by A1. If VSENSE is higher than V1, the output of A1 will To obtain the best performance, tradeoffs should be made decrease, thus reducing the amount of current delivered to in the compensation network design. A higher value of LEDs. In this manner the current sensing voltage VSENSE compensation capacitor improves the stability and dim- is regulated to V1. ming range (a larger capacitance helps hold the VC voltage when the PWM signal is low). However, a large compen- Converters 2 and 3 are identical to converter 1. sation capacitor also increases the start-up time and the
PWM Dimming Control
time to recover from a fault condition. Similarly, a larger LED1 can be dimmed with pulse width modulation us- compensation resistor improves the transient response ing the PWM1 pin and an external P-channel MOSFET, but may reduce the phase margin. A practical approach M1. If the PWM1 pin is pulled high, M1 is turned on by is to start with one of the circuits in this data sheet that internal driver A7 and converter 1 operates nominally. is similar to your application and tune the compensation A7 limits CAP1-TG1 to 6.5V to protect the gate of M1. If network to optimize the performance. The stability, PWM 3496ff Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts