Datasheet AD7719 (Analog Devices) - 10

AD7719
The serial interface can be reset by exercising the RESET input Some microprocessor or microcontroller serial interfaces have a on the part. It can also be reset by writing a series of 1s on the single serial data line. In this case, it is possible to connect the DIN input. If a logic 1 is written to the AD7719 DIN line for at AD7719’s DATA OUT and DATA IN lines together and connect least 32 serial clock cycles, the serial interface is reset. This ensures them to the single data line of the processor. A 10 kΩ pull-up that in 3-wire systems, if the interface gets lost, either via a software resistor should be used on this single data line. In this case, if the error or by some glitch in the system, it can be reset back to a interface gets lost, because the read and write operations share known state. This state returns the interface to where the AD7719 the same line, the procedure to reset it to a known state is is expecting a write operation to its Communications register. This somewhat different than previously described. It requires a read operation resets the contents of all registers to their power-on operation of 24 serial clocks followed by a write operation where reset values. a logic 1 is written for at least 32 serial clock cycles to ensure that the serial interface is back in a known state.
PIN CONFIGURATION IOUT1 1 28 XTAL1 IOUT2 2 27 XTAL2 AV 3 DD 26 DVDD AGND 4 25 DGND REFIN1(–) 5 24 DIN AD7719 REFIN1(+) 6 23 TOP VIEW DOUT AIN1 7 (Not to Scale) 22 RDY AIN2 8 21 CS AIN3 9 20 SCLK AIN4 10 19 RESET AIN5 11 18 P1/SW1 AIN6 12 17 PWRGND REFIN2 13 16 P2/SW2 P4 14 15 P3 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Function
1 IOUT1 Output for Internal 200 µA Excitation Current Source. Current source IEXC1 and/or IEXC2 can be switched to this output. 2 IOUT2 Output for Internal 200 µA Excitation Current Source. Current source IEXC1 and/or IEXC2 can be switched to this output. 3 AVDD Analog Supply Voltage. 4 AGND Analog Ground. 5 REFIN1(–) Negative Reference Input for Main ADC Channel. This reference input can lie anywhere between AGND and AVDD – 1 V. 6 REFIN1(+) Positive Reference Input for Main ADC Channel. REFIN1(+) can lie anywhere between AVDD and AGND + 1 V. The nominal reference voltage (REFIN1(+) – REFIN1(–)) is 2.5 V, but the part is functional with a reference range from 1 V to AVDD. 7 AIN1 Analog Input. AIN1 is dedicated to the main channel. 8 AIN2 Analog Input. AIN2 is dedicated to the main channel. 9 AIN3 Analog Input. AIN3 can be multiplexed to either the main or auxiliary channel. 10 AIN4 Analog Input. AIN4 can be multiplexed to either the main or auxiliary channel. 11 AIN5 Analog Input. AIN5 is dedicated to the auxiliary channel and is referenced to AIN6 or AGND. 12 AIN6 Analog Input. AIN6 is dedicated to the auxiliary channel. It forms a differential input pair with AIN5 in fully differential input mode or is referenced to AGND in pseudodifferential mode. 13 REFIN2 Single-Ended Reference Input for Auxiliary Channel. The nominal input reference is 2.5 V. The auxiliary channel will function with an input reference range from 1 V to AVDD. 14 P4 General-Purpose I/O Bit. The input and output voltage levels are referenced to AVDD and AGND. 15 P3 General-Purpose I/O Bit. The input and output voltage levels are referenced to AVDD and AGND. REV. A –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE TIMING CHARACTERISTICS DIGITAL INTERFACE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics DUAL-CHANNEL ADC CIRCUIT INFORMATION Overview Main Channel Auxiliary Channel Both Channels MAIN AND AUXILIARY ADC NOISE PERFORMANCE ON-CHIP REGISTERS Communications Register (A3, A2, A1, A0 = 0, 0, 2, 0) Status Register (A3, A2, A1, A0 = 0, 0, 0, 0; Power-On Reset = 0x00) Mode Register (A3, A2, A1, A0 = 0, 0, 0, 1; Power-On Reset = 0x00) Operating Characteristics when Addressing the Mode and Control Registers Main ADC Control Register (AD0CON): (A3, A2, A1, A0 = 0, 0, 1, 0; Power-On Reset = 0x07) Aux ADC Control Registers (AD1CON): (A3, A2, A1, A0 = 0, 0, 1, 1; Power-On Reset = 0x00) Filter Register (A3, A2, A1, A0 = 0, 1, 0, 0; Power-On Reset = 0x45) I/O and Current Source Control Register (IOCON): (A3, A2, A1, A0 = 0, 1, 1, 1; Power-On Reset = 0x0000) Main ADC Data Result Registers (DATA0): (A3, A2, A1, A0 = 0, 1, 0, 1; Power-On Reset = 0x00 0000) Aux ADC Data Result Registers (DATA1): (A3, A2, A1, A0 = 0, 1, 1, 0; Power-On Reset = 0x0000) Main ADC Offset Calibration Coefficient Registers (OF0): (A3, A2, A1, A0 = 1, 0, 0, 0; Power-On Reset = 0x80 0000) Aux ADC Offset Calibration Coefficient Registers (OF1): (A3, A2, A1, A0 = 1, 0, 0, 1; Power-On Reset = 0x8000) Main ADC Gain Calibration Coefficient Registers (GNO): (A3, A2, A1, A0 = 1, 0, 1, 0; Power-On Reset = 0x5X XXX5) Aux ADC Gain Calibration Coefficient Registers (GN1): (A3, A2, A1, A0 = 1, 0, 1, 1; Power-On Reset = 0x59XX) ID Register (ID): (A3, A2, A1, A0 = 1, 1, 1, 1; Power-On Reset = 0x0X) User Nonprogrammable Test Registers CONFIGURING THE AD7719 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7719-to-68HC11 Interface AD7719-to-8xC51 Interface AD7719-to-ADSP-2103/ADSP-2105 Interface CIRCUIT DESCRIPTION Analog Input Channels Programmable Gain Amplifier Bipolar/Unipolar Configuration Data Output Coding Burnout Currents Excitation Currents Crystal Oscillator Reference Input Reference Detect Reset Input Power-Down Mode Idle Mode ADC Disable Mode Calibration Grounding and Layout APPLICATIONS Pressure Measurement Temperature Measurement 3-Wire RTD Configurations Smart Transmitters OUTLINE DIMENSIONS Revision History