Datasheet LT8410, LT8410-1 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Ultralow Power Boost Converter with Output Disconnect |
| Páginas / Página | 16 / 7 — PIN FUNCTIONS. SHDN (Pin 1):. VREF (Pin 7):. CC (Pin 2):. GND (Pin 3):. … |
| Formato / tamaño de archivo | PDF / 329 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. SHDN (Pin 1):. VREF (Pin 7):. CC (Pin 2):. GND (Pin 3):. FBP (Pin 8):. SW (Pin 4):. OUT (Pin 5):. CAP (Pin 6):
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LT8410/LT8410-1
PIN FUNCTIONS SHDN (Pin 1):
Shutdown Pin. This pin is used to enable/
VREF (Pin 7):
Reference Pin. Soft-start can be achieved disable the chip. Drive below 0.3V to disable the chip. Drive by placing a capacitor from this pin to GND. This cap above 1.45V to activate the chip. Do not float this pin. will be discharged for 70µs (typical) at the beginning
V
of start-up and then be charged to 1.235V with a 10μA
CC (Pin 2):
Input Supply Pin. Must be locally bypassed to GND. See the Typical Applications section. current source.
GND (Pin 3):
Ground. Tie directly to local ground plane.
FBP (Pin 8):
Positive Feedback Pin. This pin is the error amplifier’s positive input terminal. To achieve the desired
SW (Pin 4):
Switch Pin. This is the collector of the inter- output voltage, choose the FBP pin voltage (VFBP) accord- nal NPN power switch. Minimize the metal trace area ing to the following formula: connected to this pin to minimize EMI. VOUT
V
V
OUT (Pin 5):
Drain of Output Disconnect PMOS. Place FBP = 31.85 a bypass capacitor from this pin to GND.
CAP (Pin 6):
Cathode of the Internal Schottky Diode. Place For protection purposes, the output voltage can not exceed a bypass capacitor from this pin to GND. 40V even if VFBP is driven higher than VREF.
Exposed Pad (Pin 9):
Pin 9 is floating but must be ground- ed for proper shielding.
BLOCK DIAGRAM
2 1 5 6 4 VCC SHDN VOUT CAP SW ENABLE CHIP MAX 10µA 12.4M + 1.235V + – OUTPUT DISCONNECT V 400k REF – CONTROL 1.235V 7 DISCHARGE CONTROL TIMING AND PEAK SWITCH CURRENT CONTROL CONTROL FB – FBP + VC 8 + 1.235V + – EXPOSED PAD (GND) GND 9 3 84101fc For more information www.linear.com/LT8410 7 Document Outline Description Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Features Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS SHDN (Pin 1):
Shutdown Pin. This pin is used to enable/
VREF (Pin 7):
Reference Pin. Soft-start can be achieved disable the chip. Drive below 0.3V to disable the chip. Drive by placing a capacitor from this pin to GND. This cap above 1.45V to activate the chip. Do not float this pin. will be discharged for 70µs (typical) at the beginning
V
of start-up and then be charged to 1.235V with a 10μA
CC (Pin 2):
Input Supply Pin. Must be locally bypassed to GND. See the Typical Applications section. current source.
GND (Pin 3):
Ground. Tie directly to local ground plane.
FBP (Pin 8):
Positive Feedback Pin. This pin is the error amplifier’s positive input terminal. To achieve the desired
SW (Pin 4):
Switch Pin. This is the collector of the inter- output voltage, choose the FBP pin voltage (VFBP) accord- nal NPN power switch. Minimize the metal trace area ing to the following formula: connected to this pin to minimize EMI. VOUT
V
V
OUT (Pin 5):
Drain of Output Disconnect PMOS. Place FBP = 31.85 a bypass capacitor from this pin to GND.
CAP (Pin 6):
Cathode of the Internal Schottky Diode. Place For protection purposes, the output voltage can not exceed a bypass capacitor from this pin to GND. 40V even if VFBP is driven higher than VREF.
Exposed Pad (Pin 9):
Pin 9 is floating but must be ground- ed for proper shielding.
BLOCK DIAGRAM
2 1 5 6 4 VCC SHDN VOUT CAP SW ENABLE CHIP MAX 10µA 12.4M + 1.235V + – OUTPUT DISCONNECT V 400k REF – CONTROL 1.235V 7 DISCHARGE CONTROL TIMING AND PEAK SWITCH CURRENT CONTROL CONTROL FB – FBP + VC 8 + 1.235V + – EXPOSED PAD (GND) GND 9 3 84101fc For more information www.linear.com/LT8410 7 Document Outline Description Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Features Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts