Datasheet LTC1608 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | High Speed, 16-Bit, 500ksps Sampling A/D Converter with Shutdown |
| Páginas / Página | 20 / 6 — TYPICAL PERFOR A CE CHARACTERISTICS. Power Supply Feedthrough. Input … |
| Formato / tamaño de archivo | PDF / 816 Kb |
| Idioma del documento | Inglés |
TYPICAL PERFOR A CE CHARACTERISTICS. Power Supply Feedthrough. Input Common Mode Rejection. Intermodulation Distortion
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LTC1608
W U TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Feedthrough Input Common Mode Rejection Intermodulation Distortion vs Ripple Frequency vs Input Frequency
0 0 80 f f SAMPLE = 500kHz SAMPLE = 500kHz f VRIPPLE = 10mV 70 –20 IN1 = 96.56kHz –20 fIN2 = 99.98kHz 60 –40 –40 50 –60 –60 40 –80 –80 30 AMPLITUDE (dB) FEEDTHROUGH (dB) –100 –100 20 A AMPLITUDE OF POWER SUPPLY VDD –120 –120 VSS COMMON MODE REJECTION (dB) 10 –140 –140 0 0 50 100 150 200 250 1k 10k 100k 1M 1k 10k 100k 1M FREQUENCY (kHz) INPUT FREQUENCY (Hz) INPUT FREQUENCY (Hz) 1608 G07 1608 G08 1608 G14a
U U U PI FU CTIO S A + IN (Pin 1):
Positive Analog Input. The ADC converts the
OGND (Pin 28):
Digital Ground for Output Drivers. difference voltage between A + – IN and AIN with a differen-
OV
tial range of ±2.5V. A +
DD (Pin 29):
Digital Power Supply for Output Drivers. IN has a ± 2.5V input range when Bypass to OGND with 10µF tantalum in parallel with 0.1µF A – IN is grounded. ceramic.
A – IN (Pin 2):
Negative Analog Input. Can be grounded, tied
RD (Pin 30):
Read Input. A logic low enables the output to a DC voltage or driven differentially with A + IN . drivers when CS is low.
VREF (Pin 3):
2.5V Reference Output. Bypass to AGND with
CONVST (Pin 31):
Conversion Start Signal. This active 2.2µF tantalum in parallel with 0.1µF ceramic. low signal starts a conversion on its falling edge when CS
REFCOMP (Pin 4):
4.375V (Nominal) Reference Compen- is low. sation Pin. Bypass to AGND with 22µF tantalum in parallel
CS (Pin 32):
The Chip Select Input. Must be low for the ADC with 0.1µF ceramic. This is not recommended for use as to recognize CONVST and RD inputs. an external reference due to part-to-part output voltage variations and glitches that occur during the conversion.
SHDN (Pin 33):
Power Shutdown. Drive this pin low with CS low for nap mode. Drive this pin low with CS high for
AGND (Pins 5 to 8):
Analog Grounds. Tie to analog ground sleep mode. plane.
V DV SS (Pin 34):
– 5V Negative Supply. Bypass to AGND with
DD (Pin 9):
5V Digital Power Supply. Bypass to DGND 10µF tantalum in parallel with 0.1µF ceramic. with 10µF tantalum in parallel with 0.1µF ceramic.
AV DGND (Pin 10):
Digital Ground for Internal Logic. Tie to
DD (Pin 35):
5V Analog Power Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic. analog ground plane.
AV D15 to D0 (Pins 11 to 26):
Three-State Data Outputs. D15
DD (Pin 36):
5V Analog Power Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic and is the Most Significant Bit. connect this pin to Pin 35 with a 10Ω resistor.
BUSY (Pin 27):
The BUSY output shows the converter status. It is low when a conversion is in progress. Data is valid on the rising edge of BUSY. 6
W U TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Feedthrough Input Common Mode Rejection Intermodulation Distortion vs Ripple Frequency vs Input Frequency
0 0 80 f f SAMPLE = 500kHz SAMPLE = 500kHz f VRIPPLE = 10mV 70 –20 IN1 = 96.56kHz –20 fIN2 = 99.98kHz 60 –40 –40 50 –60 –60 40 –80 –80 30 AMPLITUDE (dB) FEEDTHROUGH (dB) –100 –100 20 A AMPLITUDE OF POWER SUPPLY VDD –120 –120 VSS COMMON MODE REJECTION (dB) 10 –140 –140 0 0 50 100 150 200 250 1k 10k 100k 1M 1k 10k 100k 1M FREQUENCY (kHz) INPUT FREQUENCY (Hz) INPUT FREQUENCY (Hz) 1608 G07 1608 G08 1608 G14a
U U U PI FU CTIO S A + IN (Pin 1):
Positive Analog Input. The ADC converts the
OGND (Pin 28):
Digital Ground for Output Drivers. difference voltage between A + – IN and AIN with a differen-
OV
tial range of ±2.5V. A +
DD (Pin 29):
Digital Power Supply for Output Drivers. IN has a ± 2.5V input range when Bypass to OGND with 10µF tantalum in parallel with 0.1µF A – IN is grounded. ceramic.
A – IN (Pin 2):
Negative Analog Input. Can be grounded, tied
RD (Pin 30):
Read Input. A logic low enables the output to a DC voltage or driven differentially with A + IN . drivers when CS is low.
VREF (Pin 3):
2.5V Reference Output. Bypass to AGND with
CONVST (Pin 31):
Conversion Start Signal. This active 2.2µF tantalum in parallel with 0.1µF ceramic. low signal starts a conversion on its falling edge when CS
REFCOMP (Pin 4):
4.375V (Nominal) Reference Compen- is low. sation Pin. Bypass to AGND with 22µF tantalum in parallel
CS (Pin 32):
The Chip Select Input. Must be low for the ADC with 0.1µF ceramic. This is not recommended for use as to recognize CONVST and RD inputs. an external reference due to part-to-part output voltage variations and glitches that occur during the conversion.
SHDN (Pin 33):
Power Shutdown. Drive this pin low with CS low for nap mode. Drive this pin low with CS high for
AGND (Pins 5 to 8):
Analog Grounds. Tie to analog ground sleep mode. plane.
V DV SS (Pin 34):
– 5V Negative Supply. Bypass to AGND with
DD (Pin 9):
5V Digital Power Supply. Bypass to DGND 10µF tantalum in parallel with 0.1µF ceramic. with 10µF tantalum in parallel with 0.1µF ceramic.
AV DGND (Pin 10):
Digital Ground for Internal Logic. Tie to
DD (Pin 35):
5V Analog Power Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic. analog ground plane.
AV D15 to D0 (Pins 11 to 26):
Three-State Data Outputs. D15
DD (Pin 36):
5V Analog Power Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic and is the Most Significant Bit. connect this pin to Pin 35 with a 10Ω resistor.
BUSY (Pin 27):
The BUSY output shows the converter status. It is low when a conversion is in progress. Data is valid on the rising edge of BUSY. 6