Datasheet AD8610, AD8620 (Analog Devices) - 2

FabricanteAnalog Devices
DescripciónLow Input Bias Current, Wide BW JFET Precision Dual Op Amp
Páginas / Página24 / 2 — AD8610/AD8620. TABLE OF CONTENTS. REVISION HISTORY. 5/08—Rev. E to Rev. …
RevisiónF
Formato / tamaño de archivoPDF / 374 Kb
Idioma del documentoInglés

AD8610/AD8620. TABLE OF CONTENTS. REVISION HISTORY. 5/08—Rev. E to Rev. F. 10/02—Rev. B to Rev. C. 5/02—Rev. A to Rev. B

AD8610/AD8620 TABLE OF CONTENTS REVISION HISTORY 5/08—Rev E to Rev F 10/02—Rev B to Rev C 5/02—Rev A to Rev B

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AD8610/AD8620 TABLE OF CONTENTS
Features .. 1  Absolute Maximum Ratings ..5  Applications ... 1  ESD Caution...5  Pin Configurations ... 1  Typical Performance Characteristics ..6  General Description ... 1  Theory of Operation .. 13  Revision History ... 2  Functional Description .. 13  Specifications ... 3  Outline Dimensions ... 22  Electrical Specifications ... 4  Ordering Guide .. 22 
REVISION HISTORY
Changes to Specifications ... 2
5/08—Rev. E to Rev. F
Changes to Ordering Guide ... 4 Updated Outline Dimensions ... 17 Changes to Figure 17 .. 8 Changes to Functional Description Section ... 13
10/02—Rev. B to Rev. C.
Changes to THD Readings vs. Common-Mode Voltage Updated Ordering Guide ... 4 Section .. 17 Edits to Figure 15 .. 12 Changes to Output Current Capability Section ... 18 Updated Outline Dimensions ... 16 Changes to Figure 66 and Figure 67 ... 19
5/02—Rev. A to Rev. B
Changes to Figure 68 .. 20 Replaced Second-Order Low-Pass Filter Section ... 20 Addition of Part Number AD8620 ... Universal Addition of 8-Lead SOIC (R-8 Suffix) Drawing .. 1
11/06—Rev. D to Rev. E
Changes to General Description ... 1 Updated Format .. Universal Additions to Specifications .. 2 Changes to Table 1 .. 3 Change to Electrical Specifications ... 3 Changes to Table 2 .. 4 Additions to Ordering Guide ... 4 Changes to Outline Dimensions ... 21 Replace TPC 29 .. 8 Changes to Ordering Guide .. 21 Add Channel Separation Test Circuit Figure ... 9 Add Channel Separation Graph .. 9
2/04—Rev. C to Rev. D.
Changes to Figure 26 .. 15 Addition of High-Speed, Low Noise Differential Driver section .. 16 Addition of Figure 30 ... 16 Rev. F | Page 2 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FUNCTIONAL DESCRIPTION Power Consumption Driving Large Capacitive Loads Slew Rate (Unity Gain Inverting vs. Noninverting) Input Overvoltage Protection No Phase Reversal THD Readings vs. Common-Mode Voltage Noise vs. Common-Mode Voltage Settling Time Output Current Capability Operating with Supplies Greater than ±13 V Input Offset Voltage Adjustment Programmable Gain Amplifier (PGA) High Speed Instrumentation Amplifier High Speed Filters Second-Order, Low-Pass Filter High Speed, Low Noise Differential Driver OUTLINE DIMENSIONS ORDERING GUIDE