Datasheet AD8027, AD8028 (Analog Devices) - 7

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Data Sheet AD8027/AD8028 ABSOLUTE MAXIMUM RATINGS Table 4.
It is recommended that rms output voltages be considered. If RL
Parameter Rating
is referenced to –VS, as in single-supply operation, the total Supply Voltage 12.6 V drive power is VS × IOUT. Power Dissipation See Figure 3 If the rms signal levels are indeterminate, consider the worst Common-Mode Input Voltage ±V ± 0.5 V case, when V S OUT = VS/4 for RL to midsupply. Differential Input Voltage ±1.8 V V 2 /4 Storage Temperature Range −65°C to +125°C P = (V × I ) ( ) S + D S S R Operating Temperature Range −40°C to +125°C L Lead Temperature Range (Soldering 10 sec) 300°C In single-supply operation with RL referenced to –VS, worst case Junction Temperature 150°C is VOUT = VS/2. Stresses at or above those listed under Absolute Maximum Airflow increases heat dissipation, effectively reducing θJA. Also, Ratings may cause permanent damage to the product. This is a more metal directly in contact with the package leads from stress rating only; functional operation of the product at these metal traces, through holes, ground, and power planes reduces or any other conditions above those indicated in the operational the θJA. Care must be taken to minimize parasitic capacitances section of this specification is not implied. Operation beyond at the input leads of high speed op amps, as described in the the maximum operating conditions for extended periods may PCB Layout section. affect product reliability. Figure 3 shows the maximum safe power dissipation in the
MAXIMUM POWER DISSIPATION
package vs. the ambient temperature for the 8-lead SOIC The maximum safe power dissipation in the AD8027/AD8028 (125°C/W), 6-lead SOT-23 (170°C/W), and 10-lead MSOP package is limited by the associated rise in junction temperature (130°C/W) packages on a JEDEC standard 4-layer board. (T
Output Short Circuit
J) on the die. The plastic encapsulating the die locally reaches the junction temperature. At approximately 150°C, which is the Shorting the output to ground or drawing excessive current glass transition temperature, the plastic changes its properties. from the AD8027/AD8028 can cause catastrophic failure. Even temporarily exceeding this temperature limit may change
2.0
the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8027/AD8028.
)
Exceeding a junction temperature of 175°C for an extended
(W N 1.5
period of time can result in changes in the silicon devices,
IO 8-LEAD SOIC T
potentially causing failure.
PA ISSI
The still air thermal properties of the package and PCB (θ
D 1.0
JA), ambient temperature (T
ER
A), and the total power dissipated in the
W
package (PD) determine the junction temperature of the die.
M PO 10-LEAD MSOP
The junction temperature can be calculated as
0.5 MU XI 6-LEAD SOT-23
TJ = TA + (PD × θJA)
MA
The power dissipated in the package (PD) is the sum of the
0
002 quiescent power dissipation and the power dissipated in the
–55 –35 –15 5 25 45 65 85 105 125 AMBIENT TEMPERATURE (°C)
package due to the load drive for al outputs. The quiescent 03327- Figure 3. Maximum Power Dissipation vs. Ambient Temperature power is the voltage between the supply pins (VS) times the quiescent current (I
ESD CAUTION
S). Assuming the load (RL) is referenced to midsupply, the total drive power is VS/2 × IOUT, some of which is dissipated in the package and some in the load (VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. PD = Quiescent Power + (Total Drive Power − Load Power)  V V  V 2 = × + × D P (V I ) S OUT OUT S S –   2 R  L  L R Rev. D | Page 7 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION Output Short Circuit ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT THEORY OF OPERATION INPUT STAGE CROSSOVER SELECTION OUTPUT STAGE DC ERRORS WIDEBAND OPERATION CIRCUIT CONSIDERATIONS Balanced Input Impedances PCB Layout Grounding Power Supply Bypassing APPLICATIONS INFORMATION USING THE /DISABLE SELECT PIN DRIVING A 16-BIT ADC BAND-PASS FILTER DESIGN TOOLS AND TECHNICAL SUPPORT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS