Datasheet ADA4806-1 (Analog Devices) - 6

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Data Sheet ADA4806-1 Parameter Test Conditions/Comments Min Typ Max Unit
NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD31 fC = 20 kHz, VOUT = 2 V p-p −114/−135 dBc fC = 100 kHz, VOUT = 2 V p-p −102/−126 dBc fC = 20 kHz, G = +2, VOUT = 4 V p-p −107/−143 dBc fC = 100 kHz, G = +2, VOUT = 4 V p-p −90/−130 dBc Input Voltage Noise f = 100 kHz 5.9 nV/√Hz Input Voltage Noise 1/f Corner 8 Hz 0.1 Hz to 10 Hz Voltage Noise 54 nV rms Input Current Noise f = 100 kHz 0.6 pA/√Hz DC PERFORMANCE Input Offset Voltage Full power mode 10 125 µV Low power mode, SLEEP = −VS 500 µV Input Offset Voltage Drift2 TMIN to TMAX, 4 σ 0.2 1.5 µV/°C Input Bias Current Full power mode 470 720 nA Low power mode, SLEEP = −VS 3 nA Input Offset Current 0.4 nA Open-Loop Gain VOUT = 1.25 V to 3.75 V 105 109 dB INPUT CHARACTERISTICS Input Resistance Common Mode 50 MΩ Differential Mode 260 kΩ Input Capacitance 1 pF Input Common-Mode Voltage Range −0.1 +4 V Common-Mode Rejection Ratio VIN, CM = 1.25 V to 3.75 V 103 133 dB SHUTDOWN PIN SHUTDOWN Voltage Low Powered down <1.5 V High Enabled >1.9 V SHUTDOWN Current Low Powered down −1.0 +0.1 µA High Enabled 0.01 1.0 µA Turn-Off Time 50% of SHUTDOWN to <10% of enabled 0.9 1.25 µs quiescent current Turn-On Time 50% of SHUTDOWN to >99% of final VOUT 1.5 4 µs SLEEP PIN SLEEP Voltage Low Powered down <1.5 V High Enabled >1.9 V SLEEP Current Low Low power mode, SLEEP = −VS −1.0 +0.1 µA High Enabled 0.01 1.0 µA Turn-Off Time (Full Power Mode to 50% of SLEEP to 30% of enabled quiescent 150 185 ns Sleep Mode) current Turn-On Time (Sleep Mode to Full 50% of SLEEP to >99% of final VOUT 450 600 ns Power Mode) Rev. 0 | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATIONS CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V SUPPLY 5 V SUPPLY 3 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION AMPLIFIER DESCRIPTION INPUT PROTECTION SHUTDOWN/SLEEP MODE OPERATION NOISE CONSIDERATIONS APPLICATIONS INFORMATION SLEW ENHANCEMENT EFFECT OF FEEDBACK RESISTOR ON FREQUENCY RESPONSE COMPENSATING PEAKING IN LARGE SIGNAL FREQUENCY RESPONSE DRIVING LOW POWER, HIGH RESOLUTION SUCCESSIVE APPROXIMATION REGISTER (SAR) ADCs DYNAMIC POWER SCALING SINGLE-ENDED TO DIFFERENTIAL CONVERSION LAYOUT CONSIDERATIONS Ground Plane Power Supply Bypassing OUTLINE DIMENSIONS ORDERING GUIDE