Datasheet Linear Technology LTC4313-3 — Ficha de datos

Fabricante	Linear Technology
Serie	LTC4313-3

Buffers de bus de 2 hilos con alto margen de ruido

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PDF, 296 Kb, Idioma: en, Archivo subido: nov 16, 2017, Páginas: 20
2-Wire Bus Buffers with High Noise Margin

Extracto del documento

Precios

Embalaje

	LTC4313CDD-3#PBF	LTC4313CDD-3#TRPBF	LTC4313CMS8-3#PBF	LTC4313CMS8-3#TRPBF	LTC4313IDD-3#PBF	LTC4313IDD-3#TRPBF	LTC4313IMS8-3#PBF	LTC4313IMS8-3#TRPBF
N	1	2	3	4	5	6	7	8
Package	3x3 DFN-8 Dibujo del esquema del paquete	3x3 DFN-8 Dibujo del esquema del paquete	MS-8 Dibujo del esquema del paquete	MS-8 Dibujo del esquema del paquete	3x3 DFN-8 Dibujo del esquema del paquete	3x3 DFN-8 Dibujo del esquema del paquete	MS-8 Dibujo del esquema del paquete	MS-8 Dibujo del esquema del paquete
Package Code	DD	DD	MS8	MS8	DD	DD	MS8	MS8
Package Index	05-08-1698	05-08-1698	05-08-1660	05-08-1660	05-08-1698	05-08-1698	05-08-1660	05-08-1660
Pin Count	8	8	8	8	8	8	8	8

Paramétricos

Parameters / Models	LTC4313CDD-3#PBF	LTC4313CDD-3#TRPBF	LTC4313CMS8-3#PBF	LTC4313CMS8-3#TRPBF	LTC4313IDD-3#PBF	LTC4313IDD-3#TRPBF	LTC4313IMS8-3#PBF	LTC4313IMS8-3#TRPBF
Data Rate, kHz	400	400	400	400	400	400	400	400
ESD, kV	4	4	4	4	4	4	4	4
Enable	yes	yes	yes	yes	yes	yes	yes	yes
Export Control	no	no	no	no	no	no	no	no
Function	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator
I2C Hot Swappable	yes	yes	yes	yes	yes	yes	yes	yes
Level Translation	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V
Number of Supplies	2	2	2	2	2	2	2	2
Operating Temperature Range, °C	0 to 70	0 to 70	0 to 70	0 to 70	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Ready	yes	yes	yes	yes	yes	yes	yes	yes
Rise Time Accelerator	no	no	no	no	no	no	no	no
Stuck Bus	yes	yes	yes	yes	yes	yes	yes	yes

Plan ecológico

	LTC4313CDD-3#PBF	LTC4313CDD-3#TRPBF	LTC4313CMS8-3#PBF	LTC4313CMS8-3#TRPBF	LTC4313IDD-3#PBF	LTC4313IDD-3#TRPBF	LTC4313IMS8-3#PBF	LTC4313IMS8-3#TRPBF
RoHS	Obediente	Obediente	Obediente	Obediente	Obediente	Obediente	Obediente	Obediente

Otras opciones

LTC4313 LTC4313-1 LTC4313-2

Artículos

Descargar
Bus Buffers Simplify Design of Large, Noisy I2C Systems &mdash LT Journal
PDF, 3.0 Mb, Archivo publicado: enero 17, 2013
Extracto del documento
design features Bus Buffers Simplify Design of Large, Noisy I2C Systems
Rajesh Venugopal The original I2C specification limited the
maximum bus operating frequency to
100k Hz; it is now 400k Hz . As systems grew
larger, bus buffers were introduced to
buffer bus capacitance and solve several other common I2C issues. Early bus buffers degraded certain I2C specifications
in a manner that can be unacceptable
in large noisy systems. The LTC4313 and
LTC4315 family of bus buffers offers the
benefits of traditional bus buffers while
maintaining compliance to all I2C voltage DRIVER HIGH
0.9 VCC
0.7 VCC
VOLTAGE The I2C bus and its derivativesвЂ”such as SMBus, PMBus,
the DDC bus of HDMI and IPMB bus of ATCAвЂ”are used in
a variety of large systems to transfer vital system information.
These bus specifications have gained wide acceptance
due to ease of use. The I2C bus is a digital serial 2-wire
bus consisting of a single clock (SCL) and single data
(SDA) line. The I2C protocol employs open drain pull-downs
to drive the bus low, and resistors or current sources to
pull the bus high. The maximum allowed pull-up current
and bus capacitance are 4mA and 400pF, respectively. LOGIC HIGH …

Linea modelo

Serie: LTC4313-3 (8)

LTC4313CDD-3#PBF LTC4313CDD-3#TRPBF LTC4313CMS8-3#PBF LTC4313CMS8-3#TRPBF LTC4313IDD-3#PBF LTC4313IDD-3#TRPBF LTC4313IMS8-3#PBF LTC4313IMS8-3#TRPBF

Clasificación del fabricante

Interface > I2C and SMBus Bus Buffers and Accelerators

Publicaciones relacionadas

Hojas de datos Datasheet Analog Devices LTC4313

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