Datasheet UC1846, UC1847, UC2846 UC2847, UC3846, UC3847 (Texas Instruments) - 5

UC1846, UC1847 , UC2846 UC2847, UC3846 , UC3847 www.ti.com
SLUS352C – JANUARY 1997 – REVISED DECEMBER 2015
6.5 Electrical Characteristics
TA=–55°C to +125°C for UC1846/7; –40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15 V, RT=10k, CT=4.7 nF, TA=TJ (unless otherwise noted)
UC1846/7 UC3846/7 UC2846/7 PARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX REFERENCE
Output Voltage TJ = 25°C, IO = 1 mA 5.05 5.10 5.15 5.00 5.10 5.20 V Line Regulation VIN = 8 V to 40 V 5 20 5 20 mV Load Regulation IL = 1 mA to 10 mA 3 15 3 15 mV Over Operating Temperature Stability 0.4 0.4 mV/°C Range, (1) Line, Load, and Total Output Variation 5.00 5.20 4.95 5.25 V Temperature (1) 10 Hz ≤ f ≤10 kHz, TJ Output Noise Voltage 100 100 µV = 25°C(1) TJ = 125°C, 1000 Long Term Stability 5 5 mV Hrs(1) Short Circuit Output Current VREF = 0 V –10 –45 –10 –45 mA
OSCILLATOR
Initial Accuracy TJ = 25°C 39 43 47 39 43 47 kHz Voltage Stability VIN =8 V to 40 V –1% 2% –1% 2% Over Operating Temperature Stability –1% –1% Range (1) Sync Output High Level 3.9 4.35 3.9 4.35 V Sync Output Low Level 2.3 2.5 2.3 2.5 V Sync Input High Level Pin 8 = 0 V 3.9 3.9 V Sync Input Low Level Pin 8 = 0 V 2.5 2.5 V Sync Voltage = 3.9 V, Sync Input Current 1.3 1.5 1.3 1.5 mA Pin 8 = 0 V
ERROR AMPLIFIER
Input Offset Voltage 0.5 5 0.5 10 mV Input Bias Current –0.6 –1 –0.6 –2 µA Input Offset Current 40 250 40 250 nA Common Mode Range VIN = 8 V to 40 V 0 VIN - 2 V 0 VIN - 2 V V ΔVO = 1.2 to 3 V, VCM Open Loop Voltage Gain 80 105 80 105 dB = 2 V Unity Gain Bandwidth TJ = 25°C(1) 0.7 1.0 0.7 1.0 MHz VCM = 0 V to 38 V, CMRR 75 100 75 100 dB VIN = 40 V PSRR VIN = 8 V to 40 V 80 105 80 105 dB VID = –15 mV to -5 V, Output Sink Current 2 6 2 6 mA VPIN7 = 1.2 V VID = 15 mV to -5 V, Output Source Current –0.4 –0.5 –0.4 –0.5 mA VPIN7 = 2.5 V High Level Output Voltage RL = (Pin 7) 15 kΩ 4.3 4.6 4.3 4.6 V Low Level Output Voltage RL = (Pin 7) 15 kΩ 0.7 1 0.7 1 V
CURRENT SENSE AMPLIFIER
VPIN 3 = 0 V, Pin 1 Amplifier Gain 2.5 2.75 3.0 2.5 2.75 3.0 V Open(2), (3) (1) These parameters, although ensured over the recommended operating conditions, are not 100% tested in production. (2) Parameter measured at trip point of latch with VPIN 5 = VREF, VPIN 6 = 0 V. (3) Amplifier gain defined as: G = ΔVPIN7 / ΔVPIN4; VPIN4 = 0 to 1.0 V Copyright © 1997–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: UC1846 UC1847 UC2846 UC2847 UC3846 UC3847 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Current Sense Amplifier 7.3.2 Oscillator 7.4 Device Functional Modes 7.4.1 Current Limit 7.4.2 Shutdown 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.2.1 Design Switching Frequency 8.2.2.2 Error Amplifier Output Configuration 8.2.2.3 Parallel Operation Configuration 8.2.2.4 Design Pulse by Pulse Current Limit Threshold 8.2.2.5 Soft-Start and Shutdown, Restart Function Design 8.2.3 Application Curves 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Related Links 11.2 Community Resources 11.3 Trademarks 11.4 Electrostatic Discharge Caution 11.5 Glossary 12 Mechanical, Packaging, and Orderable Information