Datasheet 74HC590 - 4
| Descripción | 8-bit binary counter with output register; 3-state |
| Páginas / Página | 21 / 4 — NXP Semiconductors. 74HC590. 8-bit binary counter with output register; … |
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| Idioma del documento | Inglés |
NXP Semiconductors. 74HC590. 8-bit binary counter with output register; 3-state. Pinning information. 5.1 Pinning. Fig 5
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NXP Semiconductors 74HC590 8-bit binary counter with output register; 3-state 5. Pinning information 5.1 Pinning 74HC590
terminal 1 CC Q1 V index area 1 16 Q2 2 15 Q0
74HC590
Q3 3 14 OE Q4 4 13 CPR Q1 1 16 VCC Q5 5 12 CE Q2 2 15 Q0
74HC590
Q6 6 GND(1) 11 CPC Q3 3 14 OE Q7 7 10 MRC Q1 1 16 VCC 8 9 Q4 4 13 CPR Q2 2 15 Q0 Q3 3 14 OE GND RCO Q5 5 12 CE Q4 4 13 CPR Transparent top view Q6 6 11 CPC 001aac547 Q5 5 12 CE Q6 6 11 CPC Q7 7 10 MRC (1) The die substrate is attached to Q7 7 10 MRC the exposed die pad using GND 8 9 RCO GND 8 9 RCO conductive die attach material. It can not be used as a supply pin 001aaj535 001aac564 or input.
Fig 5. Pin configuration DIP16 Fig 6. Pin configuration SO16 Fig 7. Pin configuration and TSSOP16 DHVQFN16 5.2 Pin description Table 2. Pin description Symbol Pin Description
Q0 to Q7 15, 1, 2, 3, 4, 5, 6, 7 parallel data output GND 8 ground (0 V) RCO 9 ripple carry output (active LOW) MRC 10 master reset counter input (active LOW) CPC 11 counter clock input (active HIGH) CE 12 count enable input (active LOW) CPR 13 register clock input (active HIGH) OE 14 output enable input (active LOW) VCC 16 supply voltage 74HC590_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 28 April 2009 4 of 21
Document Outline 1. General description 2. Features 3. Ordering information 4. Functional diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 6. Functional description 7. Limiting values 8. Recommended operating conditions 9. Static characteristics 10. Dynamic characteristics 11. Waveforms 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents
terminal 1 CC Q1 V index area 1 16 Q2 2 15 Q0
74HC590
Q3 3 14 OE Q4 4 13 CPR Q1 1 16 VCC Q5 5 12 CE Q2 2 15 Q0
74HC590
Q6 6 GND(1) 11 CPC Q3 3 14 OE Q7 7 10 MRC Q1 1 16 VCC 8 9 Q4 4 13 CPR Q2 2 15 Q0 Q3 3 14 OE GND RCO Q5 5 12 CE Q4 4 13 CPR Transparent top view Q6 6 11 CPC 001aac547 Q5 5 12 CE Q6 6 11 CPC Q7 7 10 MRC (1) The die substrate is attached to Q7 7 10 MRC the exposed die pad using GND 8 9 RCO GND 8 9 RCO conductive die attach material. It can not be used as a supply pin 001aaj535 001aac564 or input.
Fig 5. Pin configuration DIP16 Fig 6. Pin configuration SO16 Fig 7. Pin configuration and TSSOP16 DHVQFN16 5.2 Pin description Table 2. Pin description Symbol Pin Description
Q0 to Q7 15, 1, 2, 3, 4, 5, 6, 7 parallel data output GND 8 ground (0 V) RCO 9 ripple carry output (active LOW) MRC 10 master reset counter input (active LOW) CPC 11 counter clock input (active HIGH) CE 12 count enable input (active LOW) CPR 13 register clock input (active HIGH) OE 14 output enable input (active LOW) VCC 16 supply voltage 74HC590_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 28 April 2009 4 of 21
Document Outline 1. General description 2. Features 3. Ordering information 4. Functional diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 6. Functional description 7. Limiting values 8. Recommended operating conditions 9. Static characteristics 10. Dynamic characteristics 11. Waveforms 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents