Datasheet FT232R (FTDI) - 9

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Document No.: FT_000053 FT232R USB UART IC Datasheet Version 2.11 Clearance No.: FTDI# 38 Pin No. Name Type Description
Configurable CBUS output only Pin. Function of this pin is configured in 12 CBUS4 I/O the device internal EEPROM. Factory default configuration is SLEEP#. See CBUS Signal Options, Table 3.9. Configurable CBUS I/O Pin. Function of this pin is configured in the 13 CBUS2 I/O device internal EEPROM. Factory default configuration is TXDEN. See CBUS Signal Options, Table 3.9. Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory default configuration is PWREN#. See 14 CBUS3 I/O CBUS Signal Options, Table 3.9. PWREN# should be used with a 10kΩ resistor pull up. Configurable CBUS I/O Pin. Function of this pin is configured in the 22 CBUS1 I/O device internal EEPROM. Factory default configuration is RXLED#. See CBUS Signal Options, Table 3.9. Configurable CBUS I/O Pin. Function of this pin is configured in the 23 CBUS0 I/O device internal EEPROM. Factory default configuration is TXLED#. See CBUS Signal Options, Table 3.9.
Table 3.4 UART Interface and CUSB Group (see note 3)
Notes: 1. The minimum operating voltage VCC must be +4.0V (could use VBUS=+5V) when using the internal clock generator. Operation at +3.3V is possible using an external crystal oscillator.
2.
For details on how to use an external crystal, ceramic resonator, or oscillator with the FT232R, please refer Section 7.6 3. When used in Input Mode, the input pins are pulled to VCCIO via internal 200kΩ resistors. These pins can be programmed to gently pull low during USB suspend (PWREN# = “1”) by setting an option in the internal EEPROM. Copyright © 2010 Future Technology Devices International Limited 9 Document Outline 1 Typical Applications 1.1 Driver Support 1.2 Part Numbers Note: Packing codes for xxxx is: 1.1 1.1 1.3 USB Compliant 2 FT232R Block Diagram 3 Device Pin Out and Signal Description 3.1 28-LD SSOP Package 3.2 SSOP Package Pin Out Description 3.3 QFN-32 Package 3.4 QFN-32 Package Signal Description 3.5 CBUS Signal Options 4 Function Description 4.1 Key Features 4.2 Functional Block Descriptions 5 Devices Characteristics and Ratings 5.1 Absolute Maximum Ratings 5.2 DC Characteristics 5.3 EEPROM Reliability Characteristics 5.4 Internal Clock Characteristics 5.5 Thermal Characteristics 6 USB Power Configurations 6.1 USB Bus Powered Configuration 1.1 1.1 6.2 Self Powered Configuration 6.3 USB Bus Powered with Power Switching Configuration 6.4 USB Bus Powered with Selectable External Logic Supply 7 Application Examples 7.1 USB to RS232 Converter 7.2 USB to RS485 Coverter 1.1 1.1 1.1 7.3 USB to RS422 Converter 7.4 USB to MCU UART Interface 1.1 1.1 1.1 7.5 LED Interface 7.6 Using the External Oscillator 8 Internal EEPROM Configuration 9 Package Parameters 9.1 SSOP-28 Package Dimensions 9.2 QFN-32 Package Dimensions 9.3 QFN-32 Package Typical Pad Layout 1.1 9.4 QFN-32 Package Typical Solder Paste Diagram 9.5 Solder Reflow Profile 10 Alternative Parts 11 Contact Information Appendix A – References Appendix B - List of Figures and Tables Appendix C - Revision History