Datasheet LTC2270 (Analog Devices)
| Fabricante | Analog Devices |
| Descripción | 16-Bit, 20Msps Low Noise Dual ADC |
| Páginas / Página | 36 / 1 — FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. Integral … |
| Formato / tamaño de archivo | PDF / 593 Kb |
| Idioma del documento | Inglés |
FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. Integral Non-Linearity (INL)
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LTC2270 16-Bit, 20Msps Low Noise Dual ADC
FEATURES DESCRIPTION
n Two-Channel Simultaneously Sampling ADC The LTC®2270 is a two-channel simultaneous sampling n 84.1dB SNR (46μVRMS Input Referred Noise) 16-bit A/D converter designed for digitizing high frequency, n 99dB SFDR wide dynamic range signals. It is perfect for demanding n ±2.3LSB INL(Max) applications with AC performance that includes 84.1dB n Low Power: 160mW Total, 80mW per Channel SNR and 99dB spurious free dynamic range (SFDR). n Single 1.8V Supply DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) n CMOS, DDR CMOS, or DDR LVDS Outputs and no missing codes over temperature. The transition n Selectable Input Ranges: 1VP-P to 2.1VP-P noise is 1.44LSB n 200MHz Full Power Bandwidth S/H RMS. n Shutdown and Nap Modes The digital outputs can be either full rate CMOS, Double n Serial SPI Port for Configuration Data Rate CMOS, or Double Data Rate LVDS. A separate n Pin Compatible with output power supply allows the CMOS output swing to LTC2180: 16-Bit, 25Msps, 78mW range from 1.2V to 1.8V. LTC2140-14: 14-Bit, 25Msps, 50mW The ENC+ and ENC– inputs may be driven differentially n 64-Lead (9mm × 9mm) QFN Package or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer al-
APPLICATIONS
lows high performance at full speed for a wide range of n Low Power Instrumentation clock duty cycles. n Software Defined Radios L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Portable Medical Imaging n Multi-Channel Data Acquisition
TYPICAL APPLICATION
1.8V 1.8V
Integral Non-Linearity (INL)
VDD OVDD 2.0 1.5 CH 1 16-BIT D1_15 ANALOG 1.0 S/H ADC CORE t INPUT t t 0.5 CMOS, D1_0 DDR CMOS 0.0 OR DDR LVDS D2_15 OUTPUTS OUTPUT t –0.5 CH 2 t DRIVERS INL ERROR (LSB) 16-BIT t ANALOG S/H ADC CORE D2_0 –1.0 INPUT –1.5 –2.0 20MHz CLOCK 0 16384 32768 49152 65536 CLOCK CONTROL OUTPUT CODE 2270 TA02 2270 TA01 GND OGND 2270f 1
FEATURES DESCRIPTION
n Two-Channel Simultaneously Sampling ADC The LTC®2270 is a two-channel simultaneous sampling n 84.1dB SNR (46μVRMS Input Referred Noise) 16-bit A/D converter designed for digitizing high frequency, n 99dB SFDR wide dynamic range signals. It is perfect for demanding n ±2.3LSB INL(Max) applications with AC performance that includes 84.1dB n Low Power: 160mW Total, 80mW per Channel SNR and 99dB spurious free dynamic range (SFDR). n Single 1.8V Supply DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) n CMOS, DDR CMOS, or DDR LVDS Outputs and no missing codes over temperature. The transition n Selectable Input Ranges: 1VP-P to 2.1VP-P noise is 1.44LSB n 200MHz Full Power Bandwidth S/H RMS. n Shutdown and Nap Modes The digital outputs can be either full rate CMOS, Double n Serial SPI Port for Configuration Data Rate CMOS, or Double Data Rate LVDS. A separate n Pin Compatible with output power supply allows the CMOS output swing to LTC2180: 16-Bit, 25Msps, 78mW range from 1.2V to 1.8V. LTC2140-14: 14-Bit, 25Msps, 50mW The ENC+ and ENC– inputs may be driven differentially n 64-Lead (9mm × 9mm) QFN Package or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer al-
APPLICATIONS
lows high performance at full speed for a wide range of n Low Power Instrumentation clock duty cycles. n Software Defined Radios L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Portable Medical Imaging n Multi-Channel Data Acquisition
TYPICAL APPLICATION
1.8V 1.8V
Integral Non-Linearity (INL)
VDD OVDD 2.0 1.5 CH 1 16-BIT D1_15 ANALOG 1.0 S/H ADC CORE t INPUT t t 0.5 CMOS, D1_0 DDR CMOS 0.0 OR DDR LVDS D2_15 OUTPUTS OUTPUT t –0.5 CH 2 t DRIVERS INL ERROR (LSB) 16-BIT t ANALOG S/H ADC CORE D2_0 –1.0 INPUT –1.5 –2.0 20MHz CLOCK 0 16384 32768 49152 65536 CLOCK CONTROL OUTPUT CODE 2270 TA02 2270 TA01 GND OGND 2270f 1