Datasheet LM317L (Fairchild) - 3

LM317L — Electrical Characteristics
VI - VO = 5 V, IO = 40 mA, 0°C ≤ TJ ≤ +125°C, PDMAX = 625 mW, unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit 3-T
TA = +25°C, 3 V ≤ VI − VO ≤ 40 V 0.01 0.04 % / V RLINE Line Regulation(1)
e
3 V ≤ VI − VO ≤ 40 V 0.02 0.07 % / V
rminal 0.1A
TA = +25°C,10 mA ≤ IO ≤100 mA, 5 25 mV VO ≤ 5 V TA = +25°C,10 mA ≤ IO ≤100 mA, R 0.1 0.5 % / V LOAD Load Regulation(1) V O O ≥ 5 V 10 mA ≤ IO ≤100 mA, VO ≤ 5 V 20 70 mV
Positiv
10 mA ≤ IO ≤100 mA, VO ≥ 5 V 0.3 1.5 % / VO IADJ Adjustment Pin Current 50 100 μA
e
3 V ≤ VI - VO ≤ 40 V,
Adjust
ΔIADJ Adjustment Pin Current Change 10 mA ≤ IO ≤ 100 mA, 0.2 5 μA PD < PDMAX 3 V < VI - VO < 40 V,
able
VREF Reference Voltage 10 mA ≤ IO ≤100 mA, 1.20 1.25 1.30 V PD ≤ PDMAX
Regulator
STT Temperature Stability 0.7 % Minimum Load Current to IL(MIN) V Maintain Regulation I - VO = 40 V 3.5 10 mA VI - VO ≤ 15 V, PD < PDMAX 100 200 mA IO(MAX) Maximum Output Current TA = +25°C, 25 50 mA VI - VO ≤ 40 V, PD < PDMAX eN RMS Noise, % of VOUT TA = +25°C, 10 Hz < f < 10 kHz 0.003 % / VO VO = 10V, f = 120 Hz, 65 dB without CADJ RR Ripple Rejection VO = 10V, f = 120 Hz, 66 80 dB CADJ = 10 μF ST Long-Term Stability TJ = +125°C, 1000 Hours 0.3 %
Notes:
1. Load and Line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used. © 2002 Fairchild Semiconductor Corporation www.fairchildsemi.com LM317L Rev. 1.1.0 3