Datasheet NCP4328 (ON Semiconductor) - 10
| Fabricante | ON Semiconductor |
| Descripción | Secondary Side Controller, Constant Voltage / Constant Current (CV / CC) |
| Páginas / Página | 12 / 10 — TSOP−6 3.00x1.50x0.90, 0.95P. GENERIC. MARKING DIAGRAM*. STANDARD. … |
| Formato / tamaño de archivo | PDF / 254 Kb |
| Idioma del documento | Inglés |
TSOP−6 3.00x1.50x0.90, 0.95P. GENERIC. MARKING DIAGRAM*. STANDARD. DOCUMENT NUMBER: 98ASB14888C. DESCRIPTION:. PAGE 2 OF 2. onsemi
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TSOP−6 3.00x1.50x0.90, 0.95P
CASE 318G ISSUE W DATE 26 FEB 2024
GENERIC MARKING DIAGRAM*
XXXAYWG XXX MG G G 1 1
IC STANDARD
XXX = Specific Device Code XXX = Specific Device Code A =Assembly Location M = Date Code Y = Year G = Pb−Free Package W = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6: PIN 1. DRAIN PIN 1. EMITTER 2 PIN 1. ENABLE PIN 1. N/C PIN 1. EMITTER 2 PIN 1. COLLECTOR 2. DRAIN 2. BASE 1 2. N/C 2. V in 2. BASE 2 2. COLLECTOR 3. GATE 3. COLLECTOR 1 3. R BOOST 3. NOT USED 3. COLLECTOR 1 3. BASE 4. SOURCE 4. EMITTER 1 4. Vz 4. GROUND 4. EMITTER 1 4. EMITTER 5. DRAIN 5. BASE 2 5. V in 5. ENABLE 5. BASE 1 5. COLLECTOR 6. DRAIN 6. COLLECTOR 2 6. V out 6. LOAD 6. COLLECTOR 2 6. COLLECTOR STYLE 7: STYLE 8: STYLE 9: STYLE 10: STYLE 11: STYLE 12: PIN 1. COLLECTOR PIN 1. Vbus PIN 1. LOW VOLTAGE GATE PIN 1. D(OUT)+ PIN 1. SOURCE 1 PIN 1. I/O 2. COLLECTOR 2. D(in) 2. DRAIN 2. GND 2. DRAIN 2 2. GROUND 3. BASE 3. D(in)+ 3. SOURCE 3. D(OUT)− 3. DRAIN 2 3. I/O 4. N/C 4. D(out)+ 4. DRAIN 4. D(IN)− 4. SOURCE 2 4. I/O 5. COLLECTOR 5. D(out) 5. DRAIN 5. VBUS 5. GATE 1 5. VCC 6. EMITTER 6. GND 6. HIGH VOLTAGE GATE 6. D(IN)+ 6. DRAIN 1/GATE 2 6. I/O STYLE 13: STYLE 14: STYLE 15: STYLE 16: STYLE 17: PIN 1. GATE 1 PIN 1. ANODE PIN 1. ANODE PIN 1. ANODE/CATHODE PIN 1. EMITTER 2. SOURCE 2 2. SOURCE 2. SOURCE 2. BASE 2. BASE 3. GATE 2 3. GATE 3. GATE 3. EMITTER 3. ANODE/CATHODE 4. DRAIN 2 4. CATHODE/DRAIN 4. DRAIN 4. COLLECTOR 4. ANODE 5. SOURCE 1 5. CATHODE/DRAIN 5. N/C 5. ANODE 5. CATHODE 6. DRAIN 1 6. CATHODE/DRAIN 6. CATHODE 6. CATHODE 6. COLLECTOR
DOCUMENT NUMBER: 98ASB14888C
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TSOP−6 3.00x1.50x0.90, 0.95P PAGE 2 OF 2 onsemi
and are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.
www.onsemi.com 2
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
CASE 318G ISSUE W DATE 26 FEB 2024
GENERIC MARKING DIAGRAM*
XXXAYWG XXX MG G G 1 1
IC STANDARD
XXX = Specific Device Code XXX = Specific Device Code A =Assembly Location M = Date Code Y = Year G = Pb−Free Package W = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6: PIN 1. DRAIN PIN 1. EMITTER 2 PIN 1. ENABLE PIN 1. N/C PIN 1. EMITTER 2 PIN 1. COLLECTOR 2. DRAIN 2. BASE 1 2. N/C 2. V in 2. BASE 2 2. COLLECTOR 3. GATE 3. COLLECTOR 1 3. R BOOST 3. NOT USED 3. COLLECTOR 1 3. BASE 4. SOURCE 4. EMITTER 1 4. Vz 4. GROUND 4. EMITTER 1 4. EMITTER 5. DRAIN 5. BASE 2 5. V in 5. ENABLE 5. BASE 1 5. COLLECTOR 6. DRAIN 6. COLLECTOR 2 6. V out 6. LOAD 6. COLLECTOR 2 6. COLLECTOR STYLE 7: STYLE 8: STYLE 9: STYLE 10: STYLE 11: STYLE 12: PIN 1. COLLECTOR PIN 1. Vbus PIN 1. LOW VOLTAGE GATE PIN 1. D(OUT)+ PIN 1. SOURCE 1 PIN 1. I/O 2. COLLECTOR 2. D(in) 2. DRAIN 2. GND 2. DRAIN 2 2. GROUND 3. BASE 3. D(in)+ 3. SOURCE 3. D(OUT)− 3. DRAIN 2 3. I/O 4. N/C 4. D(out)+ 4. DRAIN 4. D(IN)− 4. SOURCE 2 4. I/O 5. COLLECTOR 5. D(out) 5. DRAIN 5. VBUS 5. GATE 1 5. VCC 6. EMITTER 6. GND 6. HIGH VOLTAGE GATE 6. D(IN)+ 6. DRAIN 1/GATE 2 6. I/O STYLE 13: STYLE 14: STYLE 15: STYLE 16: STYLE 17: PIN 1. GATE 1 PIN 1. ANODE PIN 1. ANODE PIN 1. ANODE/CATHODE PIN 1. EMITTER 2. SOURCE 2 2. SOURCE 2. SOURCE 2. BASE 2. BASE 3. GATE 2 3. GATE 3. GATE 3. EMITTER 3. ANODE/CATHODE 4. DRAIN 2 4. CATHODE/DRAIN 4. DRAIN 4. COLLECTOR 4. ANODE 5. SOURCE 1 5. CATHODE/DRAIN 5. N/C 5. ANODE 5. CATHODE 6. DRAIN 1 6. CATHODE/DRAIN 6. CATHODE 6. CATHODE 6. COLLECTOR
DOCUMENT NUMBER: 98ASB14888C
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TSOP−6 3.00x1.50x0.90, 0.95P PAGE 2 OF 2 onsemi
and are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.
www.onsemi.com 2
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com