Datasheet L9848 (STMicroelectronics) - 7

L9848 Block diagram and pin description Table 2. Pin description N° Pin Description
1 GND Analog ground 2 VDD 5V supply input 3 DRN8 Drain of low side driver #8 4 SRC2 Source of configurable driver #2 5 DRN2 Drain of configurable driver #2 6 SRC1 Source of configurable driver #1 7 DRN1 Drain of configurable driver #1 8 NC Not connected 9 IN6 PWM input for driver #6 10 SRC6 Source of configurable driver #6 11 DRN6 Drain of configurable driver #6 12 NC Not connected 13 NC Not connected 14 SCLK SPI serial clock input 15 DI SPI data in 16 CS SPI chip select (active high) 17 NC Not connected 18 DRN5 Drain of configurable driver #5 19 SRC5 Source of configurable driver #5 20 IN5 PWM input for driver #5 21 NC Not connected 22 DRN3 Drain of configurable driver #3 23 SRC3 Source of configurable driver #3 24 DRN4 Drain of configurable driver #4 25 SRC4 Source of configurable driver #4 26 DRN7 Drain of low side driver #7 27 NC Not connected 28 DO SPI data out 7/27 Document Outline Table 1. Device summary 1 Block diagram and pin description Figure 1. Block diagram Figure 2. Pin connection (top view) Table 2. Pin description 2 Electrical specifications 2.1 Absolute maximum ratings Table 3. Absolute maximum ratings 2.2 Operation conditions Table 4. Operation conditions 2.3 Thermal data Table 5. Thermal data 2.4 Electrical characteristcs 2.4.1 DC characteristics Table 6. Electrical characteristcs 2.4.2 AC characteristics Table 7. AC characteristics Figure 3. DO loading for disable time measurement Figure 4. Output loading for slew rate measurement Figure 5. Output turn on/off delays and slew rates Figure 6. SPI input/output slew ratest Figure 7. SPI timing diagram 3 Functional description 3.1 General features 3.2 Outputs - Common characteristics 3.2.1 Output 1-4 3.2.2 Output 5-6 3.2.3 Output7-8 3.3 Main power input (VDD) 3.4 Discrete inputs (IN5-6) 3.5 Serial peripheral interface (SPI) 3.5.1 Serial data output (DO) 3.5.2 Serial data input (DI) 3.5.3 Chip select (CS) 3.5.4 Serial clock (SCLK) 3.6 SPI DI input command register Table 8. Bit command register definition Table 9. Command register logic definition 3.7 Fault operation Table 10. Fault register definition Table 11. Fault logic definition 3.7.1 Initial fault register SPI Cycle 3.7.2 Incandescent lamp outputs 3.8 Configuration for Output1-6 3.8.1 Low side drivers 3.8.2 High side drivers 3.9 DRN1-6 susceptibility to negative voltage transients 3.10 Thermal shutdown 3.11 Charge pump usage 3.12 Waveshaping 3.13 POR register initialization 3.14 Abnormal voltage conditions 3.14.1 Reverse Battery 3.14.2 Maximum negative transients 3.14.3 Ground offsets 3.14.4 Loss of ground operation 4 Functional block diagram Figure 8. L9848 with external components 5 Application examples Figure 9. L9848 as mirror axis control motor drivers Figure 10. L9848 as mirror motor and bulb driver Figure 11. L9848 as window lift relay and mirror motor driver Figure 12. L9848 as bipolar stepper motor driver Figure 13. L9848 driving approach for 3 bipolar stepper-motors in sequential mode for climate applications as window lift relay and mirror motor driver 6 Package information Figure 14. SO-28 mechanical data and package dimensions 7 Revision history Table 12. Document revision history