Datasheet MAX6701, MAX6701A, MAX6702, MAX6702A, MAX6703, MAX6703A, MAX6704, MAX6705, MAX6705A, MAX6706, MAX6706A, MAX6707, MAX6707A, MAX6708 (Analog Devices) - 5

MAX6701-08/ Low-Voltage, SOT23 µP Supervisors with Power-Fail MAX6701A-03A/ In/Out, Manual Reset, and Watchdog Timer MAX6705A-07A
Pin Description PIN MAX6701(A) MAX6705(A) NAME FUNCTION MAX6702(A) MAX6704 MAX6706(A) MAX6708 MAX6703(A) MAX6707(A)
Active-Low, Manual Reset Input, Internal 50kΩ Pullup to VCC. Pull low to force a reset. Reset remains active as long as MR is low and the reset timeout period after 1 1 1 1 MR MR goes high. Leave unconnected or connect to VCC if unused. WDO deasserts when MR is low (MAX6701(A)/ MAX6702(A)/MAX6703(A)/ MAX6705(A)/ MAX6706(A)/ MAX6707(A) only) Supply Voltage for MAX6701–MAX6708 and Input for 2 2 2 2 VCC Primary Reset Threshold Monitor. Push-pull outputs are powered by VCC. 3 3 3 3 GND Ground Power-Fail Voltage Monitor Input. High-impedance input for internal power-fail comparator. Connect this — 4 4 4 PFI pin to an external resistive-divider network to set the reset threshold voltage; 0.62V (typ) threshold. Connect to GND or VCC when not used. — 5 5 5 PFO Power-Fail Monitor Output. Open drain or push-pull active low. PFO goes low when PFI is less than 0.62V. Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer runs out and WDO is asserted. WDO is asserted low after each watchdog overflow and remains low until the watchdog timer is cleared (the reset output is not 6 6 6 — WDI affected). The internal watchdog timer clears whenever a VCC/RST_IN1/RST_IN2 reset is asserted, the manual reset is asserted, or WDI sees a rising or falling edge. The watchdog timer remains cleared until the reset output is deasserted. On the MAX6704, RESET pulse asserts for the reset timeout period after each watchdog timeout overflow. The watchdog timer cannot be disabled. — — — 6 N.C. No Connection. Not internally connected. Active-Low Reset Output (Open Drain or Push-Pull). RESET changes from high to low when the VCC input drops below the selected reset threshold (or RST_IN1/ 7 7 7 7 RESET RST_IN2 for the MAX6701(A)/MAX6702(A)/MAX6703(A), MR is pulled low, or the watchdog triggers a reset (MAX6704 only). RESET remains low for the reset timeout period after the reset conditions are terminated. www.maximintegrated.com Maxim Integrated │ 5