Datasheet TLV9161, TLV9162, TLV9164 (Texas Instruments) - 8

link to page 8 link to page 8 link to page 8
TLV9161, TL V9162, TLV9164
SBOSA68D – NOVEMBER 2021 – REVISED MARCH 2024
www.ti.com 5.4 Thermal Information for Single Channel TLV9161, TLV9161S DBV DCK THERMAL METRIC
(1)
Unit (SOT-23) (SC70) 5 PINS 6 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 185.4 166.9 198.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 83.9 83.9 94.1 °C/W RθJB Junction-to-board thermal resistance 52.5 47.1 45.3 °C/W ψJT Junction-to-top characterization parameter 25.4 25.9 16.9 °C/W ψJB Junction-to-board characterization parameter 52.1 47.0 45.0 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
5.5 Thermal Information for Dual Channel TLV9162, TLV9162S D DDF DGK DSG PW RUG THERMAL METRIC
(1)
Unit (SOIC) (SOT-23) (VSSOP) (WSON) (TSSOP) (X2QFN) 8 PINS 8 PINS 8 PINS 8 PINS 8 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 131.0 149.6 174.2 74.8 183.4 131.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 73.0 85.3 65.9 93.6 72.4 52.9 °C/W RθJB Junction-to-board thermal resistance 74.5 68.6 95.9 42.1 114.0 62.0 °C/W ψJT Junction-to-top characterization parameter 25.0 7.9 11.0 3.8 12.1 1.1 °C/W Junction-to-board characterization ψJB 73.8 68.4 94.4 41.9 112.3 61.8 °C/W parameter Junction-to-case (bottom) thermal RθJC(bot) N/A N/A N/A 17.0 N/A N/A °C/W resistance (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
5.6 Thermal Information for Quad Channel TLV9164 D PW THERMAL METRIC
(1)
UNIT (SOIC) (TSSOP) 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 99.0 118.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 55.1 47.0 °C/W RθJB Junction-to-board thermal resistance 54.8 61.9 °C/W ψJT Junction-to-top characterization parameter 16.7 5.5 °C/W ψJB Junction-to-board characterization parameter 54.4 61.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. 8 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TLV9161 TLV9162 TLV9164 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information for Single Channel 5.5 Thermal Information for Dual Channel 5.6 Thermal Information for Quad Channel 5.7 Electrical Characteristics 5.8 Typical Characteristics 6 Detailed Description 6.1 Overview 6.2 Functional Block Diagram 6.3 Feature Description 6.3.1 Input Protection Circuitry 6.3.2 EMI Rejection 6.3.3 Thermal Protection 6.3.4 Capacitive Load and Stability 6.3.5 Common-Mode Voltage Range 6.3.6 Phase Reversal Protection 6.3.7 Electrical Overstress 6.3.8 Overload Recovery 6.3.9 Typical Specifications and Distributions 6.3.10 Packages With an Exposed Thermal Pad 6.3.11 Shutdown 6.4 Device Functional Modes 7 Application and Implementation 7.1 Application Information 7.2 Typical Applications 7.2.1 Low-Side Current Measurement 7.2.1.1 Design Requirements 7.2.1.2 Detailed Design Procedure 7.2.1.3 Application Curve 7.2.2 Buffered Multiplexer 7.3 Power Supply Recommendations 7.4 Layout 7.4.1 Layout Guidelines 7.4.2 Layout Example 8 Device and Documentation Support 8.1 Device Support 8.1.1 Development Support 8.1.1.1 TINA-TI™ (Free Software Download) 8.2 Documentation Support 8.2.1 Related Documentation 8.3 Receiving Notification of Documentation Updates 8.4 Support Resources 8.5 Trademarks 8.6 Electrostatic Discharge Caution 8.7 Glossary 9 Revision History 10 Mechanical, Packaging, and Orderable Information