Datasheet LMR1901YG-M (Rohm)

link to page 4 link to page 4 link to page 4
Nano EnergyTM
Datasheet
Operational Amplifier Automotive Ultra Low Power Low Offset Voltage Rail-to-Rail Input/Output CMOS Operational Amplifiers LMR1901YG-M General Description Key Specifications
LMR1901YG-M single CMOS operational amplifier ◼ Supply Current: 160 nA (Typ) features ultra low power, low offset voltage and Rail-to- ◼ Input Offset Voltage: 0.55 mV (Max) Rail Input/Output that suitable for battery-powered ◼ Common-mode Input Voltage Range: equipment, portable equipment and sensor amplifiers. VSS to VDD ◼ Input Bias Current: 0.5 pA (Typ)
Features
◼ Operating Supply Voltage Range ◼ Nano Energy™ Integrated OPAMP Single Supply: 1.7 V to 5.5 V ◼ AEC-Q100 Qualified(Note 1) Dual Supply: ±0.85 V to ±2.75 V ◼ Ultra Low Supply Current ◼ Operating Temperature Range: -40 °C to +105 °C ◼ Low Input Offset Voltage ◼ Rail-to-Rail Input/Output (Note 1) Grade 2
Package W (Typ) x D (Typ) x H (Max)
SSOP5 2.9 mm x 2.8 mm x 1.25 mm
Applications
◼ Battery-powered Equipment ◼ Portable Equipment ◼ Sensor Amplifiers ◼ Car Navigation System ◼ Car Audio ◼ Current Monitoring Amplifier ◼ Human Detection Sensor Amplifier ◼ Gas Sensor Amplifier ◼ Photodiode Amplifier SSOP5
Typical Application Circuit
RF = 5 MΩ VDD = +2.5 V RIN = 50 kΩ 𝑅 VIN VOUT 𝑉 𝐹 𝑉 𝑂𝑈𝑇 = − 𝑅 𝐼𝑁 𝐼𝑁 VSS = -2.5 V Nano Energy™ is a trademark or a registered trademark of ROHM Co., Ltd. 〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays. www.rohm.com
TSZ02201-0GLG2G800170-1-2
© 2023 ROHM Co., Ltd. All rights reserved. 1/21 TSZ22111 • 14 • 001
04.Aug.2023 Rev.001
Document Outline General Description Features Applications Key Specifications Package Typical Application Circuit Pin Configuration Block Diagram Description of Blocks Absolute Maximum Ratings Thermal Resistance Recommended Operating Conditions Function Explanation Electrical Characteristics Typical Performance Curves Figure 1. Supply Current vs Supply Voltage Figure 2. Supply Current vs Ambient Temperature Figure 3. Output Voltage High vs Supply Voltage Figure 4. Output Voltage High vs Ambient Temperature Figure 5. Output Voltage Low vs Supply Voltage Figure 6. Output Voltage Low vs Ambient Temperature Figure 7. Output Source Current vs Output Voltage Figure 8. Output Sink Current vs Output Voltage Figure 9. Output Source Current vs Output Voltage Figure 10. Output Sink Current vs Output Voltage Figure 11. Input Offset Voltage vs Supply Voltage Figure 12. Input Offset Voltage vs Ambient Temperature Figure 13. Input Offset Voltage vs Supply Voltage Figure 14. Input Offset Voltage vs Ambient Temperature Figure 15. Input Offset Voltage vs Common-mode Input Voltage Figure 16. Input Offset Voltage vs Common-mode Input Voltage Figure 17. Large Signal Voltage Gain vs Supply Voltage Figure 18. Large Signal Voltage Gain vs Ambient Temperature Figure 19. Common-mode Rejection Ratio vs Supply Voltage Figure 20. Common-mode Rejection Ratio vs Ambient Temperature Figure 21. Power Supply Rejection Ratio vs Ambient Temperature Figure 22. Input Bias Current vs Ambient Temperature Figure 23. Input-referred Noise Voltage Density vs Frequency Figure 24. Input-referred Noise Voltage Density vs Frequency Figure 25. Slew Rate vs Supply Voltage Figure 26. Slew Rate vs Ambient Temperature Figure 27. Slew Rate vs Ambient Temperature Figure 28. Gain Bandwidth Product vs Ambient Temperature Figure 29. Phase Margin vs Load Capacitance Figure 30. Phase Margin vs Load Capacitance Figure 31. Voltage Gain, Phase vs Frequency Figure 32. Voltage Gain, Phase vs Frequency Figure 33. Large-Signal Step Response Figure 34. Large-Signal Step Response Application Examples I/O Equivalence Circuits Operational Notes 1. Reverse Connection of Power Supply 2. Power Supply Lines 3. Ground Voltage 4. Ground Wiring Pattern 5. Recommended Operating Conditions 6. Inrush Current 7. Testing on Application Boards 8. Inter-pin Short and Mounting Errors 9. Unused Input Pins 10. Regarding the Input Pin of the IC 11. Ceramic Capacitor Ordering Information Marking Diagram Physical Dimension and Packing Information Revision History