Datasheet IRFZ24 (Vishay) - 5

IRFZ24
www.vishay.com Vishay Siliconix
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L VDS VDS Vary t tp p to obtain required I V AS DD R D.U.T. G A + V V - DD DS IAS 10 V t 0.01 I p Ω AS
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T. Q 50 kΩ G 10 V 12 V 0.2 µF 0.3 µF Q Q GS GD + V D.U.T. DS - VG VGS 3 mA Charge I I G D Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test
S21-1262-Rev. D, 27-Dec-2021
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