TSB711, TSB711A, TSB712, TSB712ATypical performance characteristics4Typical performance characteristics RL connected to VCC / 2 (unless otherwise specified). Figure 4. Input offset voltage distribution at VFigure 3. Supply current vs. supply voltageCC = 5 VTSB711A, TSB712AFigure 5. Input offset voltage distribution at VCC = 36 VFigure 6. Input offset voltage vs. temperature at VTSB711A, TSB712ACC = 5 VDS12487 - Rev 7page 8/32 Document Outline TSB711, TSB711A, TSB712, TSB712A 1 Pin description 2 Absolute maximum ratings and operating conditions 3 Electrical characteristics 4 Typical performance characteristics 5 Application information 5.1 Operating voltages 5.2 Input pin voltage range 5.3 Rail-to-rail input stage 5.4 Input offset voltage drift over the temperature 5.5 Long term input offset voltage drift 5.6 EMI rejection 5.7 Maximum power dissipation 5.8 Capacitive load and stability 5.9 PCB layout recommendations 5.10 Decoupling capacitor 6 Typical applications 6.1 Low-side current sensing 7 Package information 7.1 SOT23-5 package information 7.2 MiniSO8 package information 7.3 SO8 package information 8 Ordering information Revision history