Datasheet MAX4240, MAX4241, MAX4242, MAX4243, MAX4244 (Analog Devices) - 10

Single/Dual/Quad, +1.8V/10µA, SOT23, Beyond-the-Rails Op Amps 4 _______________Detailed Description Beyond-the-Rails Input Stage
The MAX4240–MAX4244 have Beyond-the-Rails inputs MAX4240 and rail-to-rail output stages that are specifically MAX4241 designed for low-voltage, single-supply operation. The MAX4242 VIN MAX4243 input stage consists of separate NPN and PNP differen- MAX4244 tial stages, which operate together to provide a com- R3 mon-mode range extending to 200mV beyond both supply rails. The crossover region of these two pairs occurs halfway between VCC and VEE. The input offset R3 = R1 R2 voltage is typically 200µV. Low operating supply voltage, low supply current, beyond-the-rails common-mode input range, and rail-to-rail outputs make this family of operational amplifiers an excellent choice for precision or R1 R2 general-purpose, low-voltage battery-powered systems. Since the input stage consists of NPN and PNP pairs, the input bias current changes polarity as the common- Figure 1a. Minimizing Offset Error Due to Input Bias Current
MAX4240–MAX424
mode voltage passes through the crossover region. (Noninverting) Match the effective impedance seen by each input to reduce the offset error caused by input bias currents flowing through external source impedances (Figures 1a and 1b). The combination of high source impedance MAX4240 plus input capacitance (amplifier input capacitance MAX4241 plus stray capacitance) creates a parasitic pole that MAX4242 produces an underdamped signal response. Reducing MAX4243 input capacitance or placing a small capacitor across MAX4244 R3 the feedback resistor improves response in this case. The MAX4240–MAX4244 family’s inputs are protected from large differential input voltages by internal 2.2kΩ R3 = R1 R2 series resistors and back-to-back triple-diode stacks across the inputs (Figure 2). For differential input volt- VIN ages (much less than 1.8V), input resistance is typically 45MΩ. For differential input voltages greater than 1.8V, R1 R2 input resistance is around 4.4kΩ, and the input bias current can be approximated by the following equation: IBIAS = (VDIFF - 1.8V) / 4.4kΩ Figure 1b. Minimizing Offset Error Due to Input Bias Current (Inverting) IN+ 2.2kΩ IN- 2.2k Ω Figure 2. Input Protection Circuit
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