Datasheet TLV9061, TLV9062, TLV9064 (Texas Instruments) - 9

TLV9061, TLV9062, TLV9064 www.ti.com
SBOS839J – MARCH 2017 – REVISED SEPTEMBER 2019
TLV9064 D, PW Packages 14-Pin SOIC, TSSOP TLV9064 RUC Package Top View 14-Pin X2QFN Top View
OUT1 1 14 OUT4 1 4 T T U U O O IN1 2 ± 13 IN4± IN1+ 3 12 IN4+ IN1 1 ± 12 IN4± V+ 4 11 V± 4 3 1 1 IN1+ 2 11 IN4+ IN2+ 5 10 IN3+ IN2 6 ± 9 IN3± V+ 3 10 V± OUT2 7 8 OUT3 IN2+ 4 9 IN3+ 6 7 Not to scale IN2 5 ± 8 IN3±
TLV9064 RTE Package 16-Pin WQFN With Exposed Thermal Pad
2 3 T T Not to scale
Top View
U U O O 1 4 T T 1± U U 4± IN O O IN 6 5 4 3 1 1 1 1 IN1+ 1 12 IN4+ V+ 2 11 V± Thermal IN2+ 3 Pad 10 IN3+ IN2 4 ± 9 IN3± 5 6 7 8 2 C C 3 T N N T U U Not to scale O O (1) Connect thermal pad to V–
Pin Functions: TLV9064 PIN I/O DESCRIPTION SOIC, NAME WQFN X2QFN TSSOP
IN1– 2 16 1 I Inverting input, channel 1 IN1+ 3 1 2 I Noninverting input, channel 1 IN2– 6 4 5 I Inverting input, channel 2 IN2+ 5 3 4 I Noninverting input, channel 2 IN3– 9 9 8 I Inverting input, channel 3 IN3+ 10 10 9 I Noninverting input, channel 3 IN4– 13 13 12 I Inverting input, channel 4 IN4+ 12 12 11 I Noninverting input, channel 4 Copyright © 2017–2019, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TLV9061 TLV9062 TLV9064 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Description (continued) 6 Device Comparison Table 7 Pin Configuration and Functions 8 Specifications 8.1 Absolute Maximum Ratings 8.2 ESD Ratings 8.3 Recommended Operating Conditions 8.4 Thermal Information: TLV9061 8.5 Thermal Information: TLV9061S 8.6 Thermal Information: TLV9062 8.7 Thermal Information: TLV9062S 8.8 Thermal Information: TLV9064 8.9 Thermal Information: TLV9064S 8.10 Electrical Characteristics 8.11 Typical Characteristics 9 Detailed Description 9.1 Overview 9.2 Functional Block Diagram 9.3 Feature Description 9.3.1 Rail-to-Rail Input 9.3.2 Rail-to-Rail Output 9.3.3 EMI Rejection 9.3.4 Overload Recovery 9.3.5 Shutdown Function 9.4 Device Functional Modes 10 Application and Implementation 10.1 Application Information 10.2 Typical Applications 10.2.1 Typical Low-Side Current Sense Application 10.2.1.1 Design Requirements 10.2.1.2 Detailed Design Procedure 10.2.1.3 Application Curve 11 Power Supply Recommendations 11.1 Input and ESD Protection 12 Layout 12.1 Layout Guidelines 12.2 Layout Example 13 Device and Documentation Support 13.1 Documentation Support 13.1.1 Related Documentation 13.2 Related Links 13.3 Receiving Notification of Documentation Updates 13.4 Community Resources 13.5 Trademarks 13.6 Electrostatic Discharge Caution 13.7 Glossary 14 Mechanical, Packaging, and Orderable Information