IRFP9140 www.vishay.com Vishay Siliconix L I V AS DS Vary tp to obtain required IAS VDS R D.U.T G -+ VDD I V AS DD - 10 V tp t 0.01 p Ω VDS Fig. 13 - Unclamped Inductive Test CircuitFig. 14 - Unclamped Inductive WaveformsFig. 15 - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. Q 50 kΩ G - 10 V 12 V 0.2 µF 0.3 µF Q Q - GS GD + V D.U.T. DS VG VGS - 3 mA Charge I I G D Current sampling resistors Fig. 16 - Basic Gate Charge WaveformFig. 17 - Gate Charge Test Circuit S22-0058-Rev. C, 31-Jan-2022 6 Document Number: 91238 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000