Datasheet AD9731 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | l0-Bit, 170 MSPS, Bipolar D/A Converter |
| Páginas / Página | 12 / 7 — AD9731. –10. ENCODE = 125MHz. –20. fOUT = 2MHz SPAN = 62.5MHz. –30. –40. … |
| Formato / tamaño de archivo | PDF / 894 Kb |
| Idioma del documento | Inglés |
AD9731. –10. ENCODE = 125MHz. –20. fOUT = 2MHz SPAN = 62.5MHz. –30. –40. –50. SFDR – dB. –60. –70. –80. –90. –100. 4020. 0Hz. 6.25MHz/DIV. 62.5MHz. START
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AD9731 60 –10 ENCODE = 125MHz –20 fOUT = 2MHz SPAN = 62.5MHz 55 –30 –40 –50 50 SFDR – dB –60 –70 45 –80 –90 –100 4020 18 16 14 12 10 8 6 4 2 0Hz 6.25MHz/DIV 62.5MHz I START STOP OUT – mA
TPC 7. SFDR vs. IOUT (Clock =125 MHz/fOUT = 40 MHz) TPC 10. Wideband SFDR 2 MHz fOUT; 125 MHz Clock
OBSOLETE 0.4 –10 0.3 ENCODE = 125MHz –20 fOUT = 10MHz SPAN = 62.5MHz 0.2 –30 0.1 –40 –50 0 LSB –60 –0.1 –70 –0.2 –80 –0.3 –90 –100 –0.4 0Hz 6.25MHz/DIV 62.5MHz START STOP
TPC 8. Typical Differential Nonlinearity TPC 11. Wideband SFDR 10 MHz fOUT; Performance (DNL) 125 MHz Clock
0.6 –10 ENCODE = 125MHz 0.4 –20 fOUT = 20MHz SPAN = 62.5MHz –30 0.2 –40 –50 0 LSB –60 –0.2 –70 –80 –0.4 –90 –100 –0.6 0Hz 6.25MHz/DIV 62.5MHz START STOP
TPC 9. Typical Integral Nonlinearity TPC 12. Wideband SFDR 20 MHz fOUT; Performance (INL) 125 MHz Clock REV. B –7– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION Typical Performance Characteristics THEORY AND APPLICATIONS Digital Inputs/Timing Input Clock and Data Timing Relationship References Analog Output EVALUATION BOARD OUTLINE DIMENSIONS Revision History
TPC 7. SFDR vs. IOUT (Clock =125 MHz/fOUT = 40 MHz) TPC 10. Wideband SFDR 2 MHz fOUT; 125 MHz Clock
OBSOLETE 0.4 –10 0.3 ENCODE = 125MHz –20 fOUT = 10MHz SPAN = 62.5MHz 0.2 –30 0.1 –40 –50 0 LSB –60 –0.1 –70 –0.2 –80 –0.3 –90 –100 –0.4 0Hz 6.25MHz/DIV 62.5MHz START STOP
TPC 8. Typical Differential Nonlinearity TPC 11. Wideband SFDR 10 MHz fOUT; Performance (DNL) 125 MHz Clock
0.6 –10 ENCODE = 125MHz 0.4 –20 fOUT = 20MHz SPAN = 62.5MHz –30 0.2 –40 –50 0 LSB –60 –0.2 –70 –80 –0.4 –90 –100 –0.6 0Hz 6.25MHz/DIV 62.5MHz START STOP
TPC 9. Typical Integral Nonlinearity TPC 12. Wideband SFDR 20 MHz fOUT; Performance (INL) 125 MHz Clock REV. B –7– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION Typical Performance Characteristics THEORY AND APPLICATIONS Digital Inputs/Timing Input Clock and Data Timing Relationship References Analog Output EVALUATION BOARD OUTLINE DIMENSIONS Revision History