User Manual DEPG0266RWS800F34 (DKE) - 7

EPD Module User Manual
5. Input/output Pin Assignment No. Name I/O Description Remark
1 NC Do not connect with other NC pins Keep Open 2 GDR O N-Channel MOSFET Gate Drive Control 3 RESE I Current Sense Input for the Control Loop 4 NC NC Do not connect with other NC pins Keep Open 5 VSH2 C Positive Source driving voltage(Red) 6 TSCL NC I2C Interface to digital temperature sensor Clock pin (This pin connect to the VSS) 7 TSDA NC I2C Interface to digital temperature sensor Data pin (This pin connect to the VSS) 8 BS1 I Bus Interface selection pin Note 5-5 9 BUSY O Busy state output pin Note 5-4 10 RES# I Reset signal input. Active Low. Note 5-3 11 D/C# I Data /Command control pin Note 5-2 12 CS# I Chip select input pin Note 5-1 13 SCL I Serial Clock pin (SPI) 14 SDA I/O Serial Data pin (SPI) 15 VDDIO P Power Supply for interface logic pins It should be connected with VCI 16 VCI P Power Supply for the chip 17 VSS P Ground Core logic power pin VDD can be regulated internally 18 VDD C from VCI. A capacitor should be connected between VDD and VSS 19 VPP P FOR TEST Keep Open 20 VSH1 C Positive Source driving voltage 21 VGH C Power Supply pin for Positive Gate driving voltage and VSH1 22 VSL C Negative Source driving voltage 23 VGL C Power Supply pin for Negative Gate driving voltage VCOM and VSL 24 VCOM C VCOM driving voltage
I = Input Pin, O =Output Pin, I/O = Bi-directional Pin (Input/output), P = Power Pin, C = Capacitor Pin
DKE CO.,LTD Page 7of33 Document Outline Update: 13. Packaging 1. Over View 2. Features 3. Mechanical and Optical Specification . 4.Mechanical Drawing of EPD Module 5. Input/output Pin Assignment 6. Electrical Characteristics 6.1 Absolute Maximum Rating 6.2 Panel DC Characteristics 6.3 Panel DC Characteristics(Driver IC Internal Re Notes:VGH,VGL,VSH,VSL drop voltage<2V. 6.4 Panel AC Characteristics 6.4.1 MCU Interface Selection 6.4.2 MCU Serial Interface (4-wire SPI) 6.4.3 MCU Serial Interface (3-wire SPI) 6.4.4 Interface Timing 7.Command Table 9. Typical Application Circuit with SPI Interface 10.Typical Operating Sequence 10.1 LUT from OTP Operation Flow 10.2 LUT from OTP Operation Reference Program Code ACTION VALUE/DATA COMMENT POWER ON 3v delay 10ms PIN CONFIG RESE# low Hardware reset delay 200us RESE# high delay 200us Read busy pin Wait for busy low Command 0x12 Software reset Read busy pin Wait for busy low SET VOLTAGE AND LOAD LUT LOAD IMAGE AND UPDATE Command 0x24 5624bytes Load BW image (152/8*296)(BW) Command 0x26 5624bytes Load image (152/8*296) (RED) Command 0x20 Read busy pin Wait for busy low Command 0x10 Data 0X01 Enter deep sleep mode POWER OFF 11. Reliability Test 12. Quality Assurance 12.1 Environment 12.2 Illuminance 12.3 Inspect method 12.4 Display area 12.5 Ghosting test method 12.6 Inspection items and acceptance criteria 12.6.1Electric defect 12.6.2 Visual defect 13.Packaging 14. Handling, Safety, and Environment Requirement