Datasheet ADuM3165, ADuM3166 (Analog Devices) - 5

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ADuM3165/ADuM3166 SPECIFICATIONS TIMING SPECIFICATIONS
4.5 V ≤ VBUS1 ≤ 5.5 V, 4.5 V ≤ VBUS2 ≤ 5.5 V, 3.0 V ≤ VDD1 ≤ 3.6 V, and 3.0 V ≤ VDD2 ≤ 3.6 V. All minimum and maximum specifications were applied over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C and VDD1 = VDD2 = 3.3 V, unless otherwise noted. Each voltage is relative to its respective ground.
Table 2. Timing Specifications Parameter Symbol Min Typ Max Unit Test Conditions/Comments
USB INPUT AND OUTPUT PINS LOW UD+, UD−, DD+, and DD− and CL = 450 pF SPEED MODE Data Rate 1.5 Mbps Propagation Delay1 tPHLL, tPLHL 300 500 600 ns TA = 25°C and VDD1 = VDD2 = 3.3 V 300 500 650 ns Output Rise and Fall Time (10% to 90%) tRL/tFL 75 300 ns TA = 25°C and VDD1 = VDD2 = 3.3 V 75 350 ns Differential Jitter Next Transition |tLJN| 5 ns Paired J to K Transition |tLJPJK| 2 ns Paired K to J Transition |tLJPKJ| 3 ns USB INPUT AND OUTPUT PINS FULL UD+, UD−, DD+, and DD−, and CL = 50 pF SPEED MODE Data Rate 12 Mbps Propagation Delay1 tPHLF, tPLHF 70 110 140 ns Output Rise/Fall Time (10% to 90%) tRF/tFF 4 20 ns TA = 25°C and VDD1 = VDD2 = 3.3 V 4 32 ns Differential Jitter Next Transition |tFJN| 450 ps Paired J to K Transition |tFJPJK| 300 ps Paired K to J Transition |tFJPKJ| 500 ps USB INPUT AND OUTPUT PINS HIGH UD+, UD−, DD+, and DD−, and CL = 10 pF SPEED MODE Data Rate 480 Mbps Propagation Delay2, 3 tPHLH, tPLHH 71 73 77 ns Output Rise and Fall Time (10% to 90%)3 tRH, tFH 675 ps Differential Jitter (rms) Next Transition |tHJN(R)| 40 ps rms Paired J to K Transition |tHJPJK(R)| 11 ps rms Paired K to J Transition |tHJPKJ(R)| 14 ps rms Differential Jitter (peak) Next Transition |tHJN(P)| 90 ps Paired J to K Transition |tHJPJK(P)| 30 ps Paired K to J Transition |tHJPKJ(P)| 40 ps 1 Propagation delay of the low or full speed USB signals in either direction is measured from the 50% level of the input signal rising or falling edge to the 50% level of the rising or falling edge of the corresponding output signal. This delay is between one and two hub differential data delays as defined in USB 2.0 specification, Table 7-11 (THDD1 and TLHDD parameters). 2 Propagation delay of the high speed USB signals in either direction is measured from the 50% level of the input signal rising or falling edge to the 50% level of the rising or falling edge of the corresponding output signal. This delay is specified to be less than one hub data delay (without cable) as defined in USB 2.0 specification, Table 7-11 (THSHDD parameter). 3 These specifications are guaranteed by design and characterization.
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Document Outline Features Applications Functional Block Diagrams General Description Specifications Timing Specifications Insulation and Safety Related Specifications Package Characteristics Regulatory Information DIN V VDE V 0884-11 (VDE V 0884-11) Insulation Characteristics (Pending) Recommended Operating Conditions Absolute Maximum Ratings Thermal Resistance Electrostatic Discharge (ESD) Ratings ESD Ratings for ADuM3165/ADuM3166 ESD Caution Pin Configurations and Function Descriptions Truth Tables Typical Performance Characteristics Terminology Bus Upstream and Downstream Hub Host Peripheral Enumeration Low Speed Full Speed High Speed End of Packet (EOP) J State K State SE0 State SE1 State Idle L1 Suspend L2 Suspend Theory of Operation Automatic Data Transfer and Modes Retimer and Other Features Isolator Characteristics and Low Power Modes Applications Information Power Supply Options Clock Options PGOOD, Clock, and Power Sequencing Isolated USB Implementations Peripheral Applications Host Applications Interface Applications PCB Layout and Electromagnetic Interference (EMI) Insulation Lifetime Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example Outline Dimensions Ordering Guide Evaluation Boards